The International Symposium on Quality Electronic Design (ISQED) — the premier Electronic Design conference — bridges the gap between Electronic/Semiconductor ecosystem members providing electronic design tools, integrated circuit technologies, semiconductor technology, packaging, assembly and test to achieve design quality.
What you will see
Tuesday, March 20, 2012
Keynote address: Taming the challenges in advanced node design
Tom Beckley, Senior Vice President, Research and Development, Custom IC and Signoff, Silicon Realization Group, Cadence Design System, Inc.
As process technology marches relentlessly forward producing multi-billion-transistor integrated circuits, there is much discussion about best design techniques and power consumption strategies in the digital community. But what does this mean for the custom and analog design worlds? Is 20nm the final frontier? How about 14nm? Are there insurmountable problems due to the exacting and power-hungry devices that make up the analog world? Well, the custom dinosaur isn’t extinct quite yet. Join this session to hear how circuit design, physical implementation, and verification are fusing into a new advanced-node methodology that copes with layout-dependent effects, complex interconnect rules, and lithography/colorization challenges so that custom and digital design can flourish together.
Tuesday March 20
Understanding, Modeling, and Detecting Pooling Hotspots in Copper CMP
Aaron Gower-Hall1, Tamba Gbondo-Tugbawa1, JenPin Weng1, Wei-tsu Tseng2, Laertis Economikos2, Toshiaki Yanagisawa2, Pavan Bashaboina2, Stephen Greco2
1Cadence Design Systems, 2IBM Semiconductor Research and Development Center
Efficient Reduction Techniques for Statistical Model Generation of Standard Cells
Sachin Shrivastava and Harindranath Parameswaran
Cadence Design Systems
Who should attend?
- Engineers, engineering managers, executives, and individuals seeking ways to reach silicon/package and board efficiently and profitably
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