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Archived webinar - The 10 New Essential SoC Interfaces - and How to Verify Them

Orignal webinar date:
14 Apr 2011  
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This webinar will spotlight 10 new interfaces that will radically change system-on-chip (SoC) designs and the electronic devices that contain them. The rapid and successful adoption of these interfaces will be critical for chip developers to field successful products, yet they are each so complex that digital verification engineers will face challenges in assuring that their designs will work as specified.

This webinar will provide an overview of these interfaces and explain why they will drive the future evolution of SoC and electronic system design. The webinar will then explain how the Cadence Verification IP offering uniquely solves the resulting digital verification challenges for IP, SoC, and system-level verification.

Questions About this Event?
Send email to webinar_info@cadence.com

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