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Archived webinar - Parasitic-Aware Design: A Complete Analog Design Flow

Original webinar date:
10 Nov 2010  
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This webinar will give you a high-level overview of the main steps involved in rapidly developing your designs and being able to deal with parasitics effectively. Each of the steps in the design, implementation, and verification of the circuits will be shown, and you will see a brief demonstration. This webinar will get you started with the proper background information to get the most out of the subsequent webinars. You will be introduced to the tools and methodology Cadence offers for parasitic-aware design analysis.

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