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Archived webinar - CircuitSutra: Role of Standards in TLM Driven Design and Verification Methodology

Orignal webinar date:
15 Sep 2010  
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In this presentation, we will talk about various SoC modeling standards and how they work with Cadence tools to enable the TLM-driven design and verification methodology. The SoC modeling standards include: OSCI SystemC IEEE 1666, OSCI TLM 1.0, OSCI TLM 2.0, OSCI SystemC synthesizable subset draft, STARC TL guidelines, and the OCP-IP modeling kit.

Questions About this Event?
Send email to webinar_info@cadence.com

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