Home > About Cadence > Events > Event Details

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Company Location *

Comments: *

Archived webinar - CircuitSutra: Role of Standards in TLM Driven Design and Verification Methodology

 
Type:
Webinar  
Orignal webinar date:
15 Sep 2010  
Location:
Online  
  View Webinar »  

In this presentation, we will talk about various SoC modeling standards and how they work with Cadence tools to enable the TLM-driven design and verification methodology. The SoC modeling standards include: OSCI SystemC IEEE 1666, OSCI TLM 1.0, OSCI TLM 2.0, OSCI SystemC synthesizable subset draft, STARC TL guidelines, and the OCP-IP modeling kit.


Questions About this Event?
Send email to webinar_info@cadence.com

View Webinar »