Stavros Tripakis received his Ph.D. in Computer Science from Joseph Fourier University in 1998. He was a Postdoctoral Research Engineer at UC Berkeley from 1999 to 2001. He has been a CNRS Researcher at the Verimag Laboratory from 2001 to 2005. He joined Cadence Berkeley Labs in 2006. His research interests include system design, verification and implementation.
Publications
Modular Code Generation from Synchronous Block Diagrams --- Modularity vs. Code Size, (POPL), 2009, Coming soon, with R. Lublinerman, and C. Szegedy.
Checking Timed Buchi Automata Emptiness on Simulation Graphs, ACM Transactions on Computational Logic, Volume 10, will appear on Number 3, 2008.
Implementing Synchronous Models on Loosely Time Triggered Architectures, IEEE Transactions on Computers. Oct 2008. Vol 57, number 10, with C. Pinello, A. Benveniste, A. Sangiovanni-Vincentelli, P. Caspi and M. Di Natale.
Translating Data Flow to Synchronous Block Diagrams, ESTIMedia, 2008, with R. Lublinerman.
Modular Code Generation from Triggered and Timed Block Diagrams, Real-Time and Embedded Technology and Applications Symposium (RTAS), 2008, with R. Lublinerman.
Modularity vs. Reusability: Code Generation from Synchronous Block Diagrams, Design Automation and Test in Europe (DATE), 2008, with R. Lublinerman.
Sensor Minimization Problems with Static or Dynamic Observers for Fault Diagnosis, Seventh International Conference on Application of Concurrency to System Design (ACSD 2007), Bratislava, Slovak Republic, July 2007, pp. 90-99, with Franck Cassez and Karine Altisen.
Synthesis Of Optimal-Cost Dynamic Observers for Fault Diagnosis of Discrete-Event Systems, First Joint IEEE/IFIP Symposium on Theoretical Aspects of Software Engineering (TASE 2007), June 5-8, 2007, Shanghai, China, pp. 316-325, with Franck Cassez and Karine Altisen.
Monitoring Fault Diagnosis and Testing Real-time Systems using Analog and Digital Clocks, Dagstuhl Seminar on Runtime Verification, Dagstuhl, Germany, January 2007.
Translating Discrete-Time Simulink to Lustre, ACM Transactions in Embedded Computing Systems (TECS), 2006, with P. Caspi, A. Curic, and C. Sofronis.
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