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Title Training Center Start Date End Date
Analog Modeling with Verilog-A vMMSIM 13.1
Technology Category: Custom IC Design - Virtuoso
Sub Category: Analog Mixed-Signal Simulation
Feldkirchen-Munich 01/06/2016 03/06/2016
Mixed Signal Simulations Using AMS Designer v14.2
Technology Category: Custom IC Design - Virtuoso
Sub Category: Analog Mixed-Signal Simulation
Bracknell-London 01/06/2016 03/06/2016
Mixed Signal Simulations Using AMS Designer v14.2
Technology Category: Custom IC Design - Virtuoso
Sub Category: Analog Mixed-Signal Simulation
Kista-Stockholm 01/06/2016 03/06/2016
Low-Power Flow with Encounter Digital Implementation v14.2
Technology Category: Advance with Engineer Explorer Series,Di..
Sub Category: Digital Implementation
Feldkirchen-Munich 01/06/2016 01/06/2016
Low-Power Flow with Innovus Implementation System v15.2
Technology Category: Advance with Engineer Explorer Series,Di..
Sub Category: Digital Implementation
Feldkirchen-Munich 01/06/2016 01/06/2016
SKILL Language Programming vIC 6.1.7
Technology Category: Custom IC Design - Virtuoso
Sub Category: Infrastructure
Feldkirchen-Munich 01/08/2016 05/08/2016
SKILL Language Programming Introduction vIC 6.1.7
Technology Category: Custom IC Design - Virtuoso
Sub Category: Infrastructure
Feldkirchen-Munich 01/08/2016 02/08/2016
SV2-SystemVerilog Assertions v4.2
Technology Category: Advance with Engineer Explorer Series,La..
Sub Category: SystemVerilog
Petah-Tikva-Tel Aviv 01/08/2016 02/08/2016
Low-Power Simulation with IEEE Std 1801™ UPF v13.2
Technology Category: Advance with Engineer Explorer Series,Fu..
Sub Category: Low Power
Petah-Tikva-Tel Aviv 01/08/2016 02/08/2016
Specman Advanced Verification v15.1
Technology Category: Advance with Engineer Explorer Series,Fu..
Sub Category: Specman
Petah-Tikva-Tel Aviv 01/08/2016 04/08/2016
Allegro PCB Librarian v16.6-2015
Technology Category: System Interconnect Design - Allegro & O..
Sub Category: Front-End
Bracknell-London 01/09/2016 02/09/2016
Allegro PCB Librarian v16.6-2015
Technology Category: System Interconnect Design - Allegro & O..
Sub Category: Front-End
Kista-Stockholm 01/09/2016 02/09/2016
Analog Modeling with Verilog-A vMMSIM 13.1
Technology Category: Custom IC Design - Virtuoso
Sub Category: Analog Mixed-Signal Simulation
Bracknell-London 01/11/2016 03/11/2016
Analog Modeling with Verilog-A vMMSIM 13.1
Technology Category: Custom IC Design - Virtuoso
Sub Category: Analog Mixed-Signal Simulation
Kista-Stockholm 01/11/2016 03/11/2016
Allegro PCB Editor Intermediate Techniques v16.6-2015
Technology Category: System Interconnect Design - Allegro & O..
Sub Category: Back-End
Vélizy-Paris 01/12/2016 02/12/2016
Allegro PCB Librarian v16.6-2015
Technology Category: System Interconnect Design - Allegro & O..
Sub Category: Front-End
Bracknell-London 01/12/2016 02/12/2016
Virtuoso Layout Pro: T7 Module Generator and Floorplanner (XL/GXL) vIC 6.1.6
Technology Category: Custom IC Design - Virtuoso
Sub Category: Physical Design v6.1
Vélizy-Paris 01/12/2016 01/12/2016
Virtuoso Layout Pro: T8 Debugging Layout Issues vIC 6.1.6
Technology Category: Custom IC Design - Virtuoso
Sub Category: Physical Design v6.1
Vélizy-Paris 01/12/2016 01/12/2016
Allegro PCB Librarian v16.6-2015
Technology Category: System Interconnect Design - Allegro & O..
Sub Category: Front-End
Kista-Stockholm 01/12/2016 02/12/2016
Advanced Synthesis with Encounter RTL Compiler v14.1
Technology Category: Advance with Engineer Explorer Series,Di..
Sub Category: Logic Design
Vélizy-Paris 01/12/2016 01/12/2016
Advanced Synthesis with Genus Synthesis Solution v15.2
Technology Category: Advance with Engineer Explorer Series,Di..
Sub Category: Logic Design
Vélizy-Paris 01/12/2016 01/12/2016
Allegro PCB Librarian v16.6-2015
Technology Category: System Interconnect Design - Allegro & O..
Sub Category: Front-End
Feldkirchen-Munich 02/06/2016 03/06/2016
Physical Verification Language Rules Writer v15.1
Technology Category: Manufacturability
Sub Category: Physical Verification
Feldkirchen-Munich 02/06/2016 03/06/2016
Analog Modeling with Verilog-A vMMSIM 13.1
Technology Category: Custom IC Design - Virtuoso
Sub Category: Analog Mixed-Signal Simulation
Petah-Tikva-Tel Aviv 02/08/2016 04/08/2016
Metric Driven Verification Using Incisive vManager v15.2
Technology Category: Advance with Engineer Explorer Series,Fu..
Sub Category: Simulation
Feldkirchen-Munich 02/08/2016 04/08/2016
SV1-SystemVerilog for Design and Verification v20.3
Technology Category: Advance with Engineer Explorer Series,La..
Sub Category: SystemVerilog
Petah-Tikva-Tel Aviv 03/07/2016 07/07/2016
SIG5-Sigrity PowerSI for Model Generation and Analysis v2016
Technology Category: System Interconnect Design - Allegro & O..
Sub Category: Signal Integrity
Feldkirchen-Munich 03/08/2016 04/08/2016
Incisive SystemC, VHDL, and Verilog Simulation v14.1
Technology Category: Functional Verification - Incisive
Sub Category: Simulation
Petah-Tikva-Tel Aviv 03/08/2016 04/08/2016
Allegro High-Speed Constraint Management v16.6-2015
Technology Category: Advance with Engineer Explorer Series,Sy..
Sub Category: High-Speed
Vélizy-Paris 03/10/2016 04/10/2016
Virtuoso Spectre Pro S1: DC Algorithm vMMSIM 14.1 IC 6.1.6
Technology Category: Advance with Engineer Explorer Series,Cu..
Sub Category: Analog Simulation
Bracknell-London 03/10/2016 03/10/2016
Virtuoso Spectre Pro S1: DC Algorithm vMMSIM 14.1 IC 6.1.6
Technology Category: Advance with Engineer Explorer Series,Cu..
Sub Category: Analog Simulation
Kista-Stockholm 03/10/2016 03/10/2016
Virtuoso Spectre Pro S2: AC, XF, STB, and Noise Analyses v14.1
Technology Category: Advance with Engineer Explorer Series,Cu..
Sub Category: Analog Simulation
Bracknell-London 03/10/2016 03/10/2016
Virtuoso Spectre Pro S2: AC, XF, STB, and Noise Analyses v14.1
Technology Category: Advance with Engineer Explorer Series,Cu..
Sub Category: Analog Simulation
Kista-Stockholm 03/10/2016 03/10/2016
Innovus Implementation System (Block) v15.2
Technology Category: Digital IC Design
Sub Category: Digital Implementation
Vélizy-Paris 03/10/2016 05/10/2016
Encounter Digital Implementation (Block) v14.2
Technology Category: Digital IC Design
Sub Category: Digital Implementation
Vélizy-Paris 03/10/2016 05/10/2016
Tempus Signoff Timing Analysis and Closure v15.2
Technology Category: Digital IC Design
Sub Category: Signoff and Analysis
Bracknell-London 03/10/2016 04/10/2016
Tempus Signoff Timing Analysis and Closure v15.2
Technology Category: Digital IC Design
Sub Category: Signoff and Analysis
Kista-Stockholm 03/10/2016 04/10/2016
SIG1-Allegro Sigrity SI Foundations v2016
Technology Category: System Interconnect Design - Allegro & O..
Sub Category: Signal Integrity
Vélizy-Paris 03/11/2016 04/11/2016
Allegro Design Entry Using OrCAD Capture v16.6-2015
Technology Category: System Interconnect Design - Allegro & O..
Sub Category: OrCAD
Feldkirchen-Munich 04/07/2016 05/07/2016
OrCAD Capture CIS-v16.6
Technology Category: System Interconnect Design - Allegro & O..
Sub Category: OrCAD
Feldkirchen-Munich 04/07/2016 06/07/2016
Virtuoso Schematic Editor vIC.6.1.6
Technology Category: Custom IC Design - Virtuoso
Sub Category: Analog Design Environment
Petah-Tikva-Tel Aviv 04/07/2016 05/07/2016
Understanding High Frequency PCB Design – High-Speed, RF, and EMI -v3.0
Technology Category: Language and Methodology Courses for Chi..
Sub Category: High-Speed
Bracknell-London 04/07/2016 08/07/2016
Understanding High Frequency PCB Design – High-Speed, RF, and EMI -v3.0
Technology Category: Language and Methodology Courses for Chi..
Sub Category: High-Speed
Kista-Stockholm 04/07/2016 08/07/2016
Incisive® Comprehensive Coverage with IMC v14.2
Technology Category: Advance with Engineer Explorer Series,Fu..
Sub Category: Simulation
Petah-Tikva-Tel Aviv 04/07/2016 05/07/2016
Low-Power Flow with Encounter Digital Implementation v14.2
Technology Category: Advance with Engineer Explorer Series,Di..
Sub Category: Digital Implementation
Petah-Tikva-Tel Aviv 04/08/2016 04/08/2016
Low-Power Flow with Innovus Implementation System v15.2
Technology Category: Advance with Engineer Explorer Series,Di..
Sub Category: Digital Implementation
Petah-Tikva-Tel Aviv 04/08/2016 04/08/2016
Virtuoso Spectre Pro S1: DC Algorithm vMMSIM 14.1 IC 6.1.6
Technology Category: Advance with Engineer Explorer Series,Cu..
Sub Category: Analog Simulation
Petah-Tikva-Tel Aviv 04/09/2016 04/09/2016
Virtuoso Spectre Pro S2: AC, XF, STB, and Noise Analyses v14.1
Technology Category: Advance with Engineer Explorer Series,Cu..
Sub Category: Analog Simulation
Petah-Tikva-Tel Aviv 04/09/2016 04/09/2016
SKILL Language Programming Introduction vIC 6.1.7
Technology Category: Custom IC Design - Virtuoso
Sub Category: Infrastructure
Petah-Tikva-Tel Aviv 04/09/2016 05/09/2016
SKILL Language Programming vIC 6.1.7
Technology Category: Custom IC Design - Virtuoso
Sub Category: Infrastructure
Petah-Tikva-Tel Aviv 04/09/2016 08/09/2016
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