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NA Training Course Detail 

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Delivery MethodVersionDatesLocationsLengthCost 
Online Subscription Available 24 hours, 7 days a week.Online2912.00Register »
OnlineIC6.1.5Available 24 hours, 7 days a week.Online  1092.00Register »
Instructor LedIC6.1.4Scheduled upon demand 16  Hrs1456.00Express Interest »
Instructor LedIC6.1.5Scheduled upon demand 16  Hrs1456.00Express Interest »
Virtual InstructorIC6.1.4Scheduled upon demand 16  Hrs1456.00Express Interest »
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Course ID:  ES_84462_IC6.1.4

Course Description

This course is the next step if you have already completed Virtuoso® Layout Design Basics. In this layout course, you implement the automation that connectivity-driven layout offers so you can attain first time silicon success. The course materials provide you with a comprehensive understanding of the power in the XL and GXL Virtuoso Layout Suites and include a robust appendix on the enhancements in the 6.1.4 release.

You examine the Cadence® Help documents, the workspace design environment, and the new binder/extractor functionality while confirming connectivity between schematic and layout, implementing synchronous clones, and applying the Process Rules Editor to override existing design rules.

You also place devices and pins and create interconnect by using the wire editor, point-to-point editor, and the guided routing editor. Using the space-based router, you autoroute a device-level design completely within the Virtuoso environment.

You analyze and update data with an Engineering Change Order (ECO). By applying the Configure Physical Hierarchy tool, you examine and implement design changes. You also use the Module Generator to examine and create a module.

Learning Objectives

In the XL and GXL Virtuoso Layout Suites, you

  • Implement the new workspace environments
  • Apply improved constraints and connectivity
  • Implement the Process Rules Editor
  • Use pin swapping and abutment
  • Implement new interactive and automatic routing
  • Analyze and update a design with improved ECO techniques
  • Implement the Configure Physical Hierarchy tool
  • Apply the new Module Generator software



Virtuoso Layout Suite GXL
Virtuoso Layout Suite L
Virtuoso Layout Suite XL


Course Agenda

    Day 1
    • Introduction and What's New? in IC 6.1.4
    • XL and GXL Environments and Workspaces
    • Constraints and Connectivity
    • Generating a Layout
    • Editing Placement
    • Creating Interconnect
    • Using the Wire Editor, Geometric Wire, Wire Assistant, Point-to-Point, and Guided Routing
    Day 2
    • The Process Rule Editor (PRE)
    • Introduction to the Virtuoso Spaced-based Automatic Router in the Virtuoso environment
    • Analyzing and Updating data
    • Configuring Physical Hierarchy
    Module Generators
    • Course Review



    • Analog/Mixed-Signal IC Designers
    • ASIC Designers
    • Chip Designers
    • Custom Circuit Designers
    • Design Engineers
    • Digital IC Designers
    • IC Designers
    • Layout Designers



    You must have experience with or already have knowledge of the following:

    • UNIX or Linux OS
    • CMOS devices
    • Text Editor
    • Layout design

    You must have completed the following course:

    • Virtuoso Layout Design Basics

    You must have experience with the following software:

    • Virtuoso Layout Suite L


    Special Notes

    The required version of Virtuoso software for this course is IC6.1.4.500.1, which is ISR1. Later versions are not recommended due to changes in the interface that are not included in this version of the course.

    Related Courses

    • Virtuoso Layout Design Basics
    • SKILL Language Programming
    • Virtuoso Connectivity-Driven Layout

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