This course gives engineers practical methods of using Assura® Parasitic Extraction (RCX) to model physical-process-related effects used during subsequent parasitic circuit simulation. The course covers development of process files along with simulation and compilation of RCX models using capgen, Cadence's capacitance model generator. Course materials are based on process examples that are relevant to real-world design problems. This course includes an RCX user's primer.
- Develop process files for the extraction of parasitic elements in your physical design.
- Use the Assura capgen utility for creating RCX models, controlling RCX run flow, and compiling RCX run scripts.
Assura® Parasitic Extraction (RCX) v3.1.7
Virtuoso® Layout Editor v5.1.41
- RCX user's primer
- Developing process files
- Running capgen and subgen
- Running capgen and subgen, continued
- Parasitic device control
- capgen process controls
- Netlisting control
Physical verification experience
Some programming experience
This course is designed for students who have some familiarity with:
- Process semiconductor physics
- Circuit simulation
- Layout design
Assura Parasitic Extraction (RCX)
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