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NA Training Course Detail 

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Delivery MethodVersionDatesLocationsLengthCost 
Online13.2Available 24 hours, 7 days a week.Online  525.00Register »
 More Online
Instructor Led14.1Scheduled upon demand 8  Hrs700.00Express Interest »
Instructor Led13.230 Oct 2014 - 30 Oct 2014Cadence San Jose > ES Training Room SJ118  Hrs700.00Register »
Instructor Led13.1Scheduled upon demand 8  Hrs700.00Express Interest »
Instructor Led11.1Scheduled upon demand 8  Hrs700.00Express Interest »

Course ID:  ES_82162_10.1

"Labs are a good depth that allowed us to use the tool but didn't cause us to get too confused"
Thomas Boyd, Teradyne

Course Description

In this course, you explore the features of the Encounter® Digital Implementation system for creating and implementing a hierarchical design. You learn several techniques to floorplan your design, create partitions (hierarchical blocks), run place and route, and optimize the design (at the block level and top level) to close timing. You learn techniques to reduce the memory-size and run time by using interface logic models (ILMs), reduce design cycles by using the Post-Assembly Closure (PAC) flow and learn how to save development time by generating and using Foundation Flow scripts.

Learning Objectives

After completing this course, you will be able to:

  • Floorplan and create partitions for your design using the Encounter Digital Implementation system
  • Implement the blocks and the top-level design using various methods after analyzing the benefits and drawbacks of each method.
  • Generate and run customized scripts (foundation flow scripts) that contain the recommended commands and options to implement your design.

Software Used in This Course

  • Encounter Digital Implementation System XL

Software Release(s)

  • EDI101

Course Agenda

Note that this course can be tailored to better meet your needscontact the Cadence training staff for specifics.

Day 1

  • Overview
  • Partitioning the design
  • Creating and using bus guides
  • Running automatic floorplan synthesis to generate an initial floorplan
  • Timing closure with iLMs
  • Automating the implementation with foundation flow scripts

Audience

  • ASIC Designers
  • CAD Engineers
  • Chip Designers
  • Layout Designers

Prerequisites

You must have experience with or knowledge of:

  • Design methodology
  • Place and route

You must have completed the following course:

  • Floorplanning, Physical Synthesis, Place and Route (Flat)

or you must have experience with the following software:

  • Encounter Digital Implementation System XL

Related Courses

  • Encounter RTL Compiler
  • Floorplanning, Physical Synthesis, Place and Route (Flat)

Click here to view course learning maps, and here for complete course catalogs.