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Friday Fun: Dante Semi Adopting Modern Chip Design Techniques

In this week's episode the team gets down to business, finally adopting modern chip design tools. All seems to be going really well, but then some strange things start to happen to the design. Good thing their new verification flow is able to catch...  Read More »
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Synthesis For Modern Chip Design? We have it Right Here...

Recently somebody pointed out to me a sponsored article that calls for changes to synthesis technology to better serve modern chip design . I fully agree with that call. I was not given a chance to fully agree in the article itself, even though the other...  Read More »
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Don't Confuse Primary With Only

Given the small nature of the EDA industry, I have read with some interest company announcements regarding "Primary" or "Key" EDA partnership status. In reading the content, it became clear to me that the wording was meant to obfuscate...  Read More »
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e Shareware on OVMWorld.org and Cadence Community Sites

As our loyal readers know, we on Team Specman works hard to include code examples inside of our posts whenever possible. However, sometimes the amount of code we want to share with you can exceed the scope of a browser window and/or RSS reader pane. Consequently...  Read More »
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What's Good About New Smoke Analysis Devices? Check out the SPB16.2 Release and See!

The AMS Simulator Smoke Analysis has been enhanced in the SPB16.2 release to support a few new devices. Also, the Model Editor now supports the addition of smoke parameters to devices like LEDs, Zener Diodes, Varistors, etc. The following new devices...  Read More »
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ISX Presentations at CDNLive! Munich

As we head into next weeks CDNLive! event in Munich it's great to see today's post in the Industry Insights area by Richard Goering on the Embedded Software Challenge . It provides concrete data on the rising costs of embedded software design...  Read More »
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Meeting the Embedded Software Challenge

As software development costs accelerate, and current tools and methodologies run out of steam, the question of how the EDA community should respond has become very timely. It’s time for an industry-wide discussion, and it should start with a look...  Read More »
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Don't Let Power Kill Your Project - What % LVT Should I Use?

By Diego Hammerschlag Sr. Technical Leader Team FED A common question or requirement that designers have is the percentage of low voltage threshold (LVT) cells that should be allowed in a design. For those not familiar with LVT cells, they are special...  Read More »
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Taiwan: From Death by DRAMs to Finding Foundry Success

Vanguard International Semiconductor, Once a DRAM failure, is Now a Successful Junior TSMC The conundrum that Taiwan DRAM makers find themselves in today has been a topic of this column for many months, along with other commentary that has appeared on...  Read More »
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Taiwan DRAM Makers...Trapped by Their Culture?

Can Taiwanese DRAM Makers Decide What to do Next...in Time? We recently saw yet another article, this one in EETimes Asia, suggesting that Taiwan DRAM makers stop bickering with one another, and go ahead and consolidate their operations into a larger...  Read More »
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