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At DAC Next Week

Yours truly will be at the big show next week, and I hope that all of you in the blogosphere will be able to sweet talk your management into letting you go as well. For those of you who have already won a golden ticket: * By all means let's meet in...  Read More »
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Simulation of Voltage Scaling for Dynamic Power Reduction

Some background info: In a previous blog , I introduced: DVFS (Dynamic Voltage and Frequency Scaling), a technique used for Dynamic Power Reduction. RVM (Real Valued Modeling) for efficient simulation of mixed signal SoC with very high speed and efficiency...  Read More »
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Freescale Technologist Eyes Move To SystemC And TLM

Are SystemC and TLM-driven design ready to replace RTL? That’s the title of a Design Automation Conference lunch panel moderated by Mark Johnstone, chief technologist for Freescale Semiconductor’ s Flow and Methodology Development Organization...  Read More »
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It's DAC Time Again!

By now, you've probably seen that Cadence is participating quite heavily in DAC this year. Many of my fellow bloggers will be there, as will I. This will make DAC #22 for me, and I'm still looking forward to it... (Parenthetical comment: I know...  Read More »
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Specman And The Cadence ESL+TLM News

Recently our colleagues on Team ESL announced a new TLM-Driven Design and Verification Solution . Team Specman guesstimates that about 15% of Specmaniacs are already using Specman with SystemC and/or some form of transaction-level modeling (TLM) flow...  Read More »
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Q&A Interview: Kurt Keutzer Charts Path To “Manycore” Parallelism

Kurt Keutzer, professor of electrical engineering and computer science at the University of California at Berkeley, believes that software applications including EDA tools can be re-architected to take advantage of “manycore” parallelism ...  Read More »
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DesignCon 2010 Call for Papers

Hello, As a member of the technical committee and as the chair member for the Analog and Mixed-Signal Design and Verification track, I would like to invite you to submit an abstract to this conference. We solicit papers for two types of sessions: technical...  Read More »
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What is Next for SystemC?

Let your voice be heard at the North American SystemC Users Group interactive Town Hall Meeting! You are invited to a lively discussion for the system-level design community on the state of SystemC and what lies ahead. Providing an interactive format...  Read More »
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The Scoop on Tracking & Validating Formal Assumptions – You Don’t Need to Assume

" Tackling formal assumptions through verification planning " is a recent article by Chris Komar and Frank Armbruster that is available on EDN. This article has fun with the old adage about what happens when you assume but very quickly get serious...  Read More »
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North American SystemC User's Group Co-Located at DAC 2009

We've been hearing about SystemC for a while. It's a great language! What's it great for? Well, you can find out from other users at the coming user group meeting co-located with DAC in San Francsico. This year promises to be full of excitement...  Read More »
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