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Physically-Aware Synthesis: This Time it’s Different

RTL Compiler Physical has been available for about 2 years now, and we're getting more customers all the time. But we still get the question - how is this different from physical synthesis tools like PKS or Physical Compiler? Those of you that were...  Read More »
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CDNLive! - How To Succeed At Formal Verification

Four customer presentations at CDNLive! Silicon Valley , held Oct. 5-16, provided some valuable tips for users and prospective users of formal verification tools. The presenters included three users of Cadence Incisive Formal Verifier (IFV) and one user...  Read More »
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How-to Plans for ECOs - Advice From Experts

By Bassilios Petrakis I often wonder whether designers plan out well in advance their ECO methodology and strategy for a project. For instance, how do they determine how many spare gates to add, what type, where to place them, how to connect them. Or...  Read More »
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Synopsys’ “Synphony” Announcement – Welcome to the Party!

I’m glad Synopsys realized the world really IS moving to the next higher level of abstraction above RTL and now the party can really get started! It’s great for RTL designers, for their companies, and the EDA industry. With the huge productivity...  Read More »
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What Lies Beyond The SystemC TLM-2.0 Standard?

By supporting SystemC model interoperability, the Transaction Level Modeling (TLM-2.0) standard from the Open SystemC Initiative ( OSCI ) was a watershed event in the development of ESL flows. But it was not the final answer. At a recent virtual platform...  Read More »
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Incisive Enterprise Verifier for Everyone!

Last week Cadence announced a new product called Incisive Enterprise Verifier (IEV) that combines simulation and formal technologies in unique and interesting ways. I am very excited about IEV for two good reasons. The first is simply that it's the...  Read More »
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The Scoop on the New Incisive Enterprise Verifier

Last week we announced Incisive Enterprise Verifier (IEV). What is cool about IEV is that it integrates formal analysis and simulation engines in unique ways that provide users with more power. One of the great things about IEV is that it is easy to use...  Read More »
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Webcast: EDA, ESL and More Ideas From DAC

From the events calendar, OpenSystems Media is hosting a webcast tomorrow titled EDA, ESL, and More Ideas from DAC that will be hosted by Don Dingee and feature presentations and discussion from Frank Schirrmeister from Synopsys, Shabtay Matalon from...  Read More »
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Virtualization and Simulation Roundtable

A couple of weeks ago I participated in a roundtable discussion led by Peggy Aycinena that has been summarized and posted on edacafe.com . Please have a look if you are interested in Virtual Platform usage for embedded software. One of the things that...  Read More »
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Spanning the Globe to Bring You the Constant Variety of Verification

Any sports fan living in the US during the 70's and 80's will remember the dramatic introduction to ABC television's " Wide World of Sports ": "Spanning the globe to bring you the constant variety of sport… the thrill...  Read More »
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