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Specman 9.2 Preview: Named Constraints

[Preface: all features in the 9.2 preview series are in Beta now. We invite you to sign-up for the beta program and give this feature a test drive!] [Team Specman welcomes Reuven Naveh from Specman R&D to introduce “his” new feature.]...  Read More »
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Friday Fun: Adopting New Low-power Design Techniques

This week's episode has the Dante Semi team employing some new low power design techniques, and using Conformal Low Power to verify their implementation of them. You will also see how the verification team uses low power simulation with Incisive to...  Read More »
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DAC Best User Track: Visualizing Debugging Using Transaction Explorer in SoC System Verification

One of the great things about DAC is the opportunity to meet new people and find out what kind of things they work on. This year I had the privilege of meeting Alicia Strang, a Verification Engineer, at Marvell Semiconductor . I first met Alicia when...  Read More »
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Survey Results and Commentary on The XJTAG Girls at DAC 2009

In my last post, I recounted the disproportionate buzz received by the "XJTAG Girls" , a pair of sales models stationed in the booth of XJTAG, Ltd. , a supplier of IEEE 1149.1 boundary scan development tools. The surprisingly strong reactions...  Read More »
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User Interview: How Faraday Reduces IC Power Consumption

Albert Chen, field applications and marketing manager at Faraday Technology , has good news and bad news about low-power IC design. The good news -- low-power design implementation has become much more efficient in the past few years. The bad news --...  Read More »
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What's Good About Blogging? - The People: Readers, Posters, Cadence!

I'm taking a break this week from the technical type posts to say THANK YOU to the people who make blogging a success. Of course, Blogging and Blogs are only successful if they are read and people post their thoughts and questions to continue a discussion...  Read More »
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More Details on Post Silicon Embedded Software Verification With ISX

Please welcome back Joerg Simon and Markus Winterholer, both from the ISX team in Germany, to the TeamESL blog for the next installment on post-silicon embedded software verification with ISX. This post is a discussion featuring Markus and Joerg talking...  Read More »
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Low Power Panel: Looking Back, Looking Forward

How far have we come with low-power IC design, and where do we need to go from here? Panelists at the Cadence Ecosystem booth at the Design Automation Conference had some compelling answers for both questions Tuesday, July 28. Two panelists were from...  Read More »
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Co-Design - Its Not Just an Exercise in Excel Any More - Learn Why at the Aug. 26 Webinar

Co-Design … some are trying to do it with spreadsheets … everyone is talking about it. But talk is cheap. Can you really optimize a package footprint and a chip I/O padring such that that package and PCB costs can be minimized? What if using...  Read More »
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Friday Fun: Modern Methodology Has Benefits

In this week's episode of "The Next Generation", the Dante Semi team reviews the project status after adopting many new techniques, such as power shutoff, assertion-based verification, physical synthesis, and multi-supply multi-voltage optimization...  Read More »
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