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Come See TeamAllegro at DesignCon2010

A new year means another DesignCon and 2010 is an exciting year for the PCB and IC Packaging team at Cadence – sometimes known as TeamAllegro. This year you will find the Cadence booth at an ideal location in the center of the Exhibition floor....  Read More »
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How Big Is An int?

This week I'm taking a break from my series on Android System Verification to talk about something completely different. One of the interesting things about working on Incisive Software Extensions (ISX) is the wide variety of embedded software and...  Read More »
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Why Twitter Is Useful For #EDA

When Twitter first came out, I couldn’t figure out how it could possibly be useful in a professional setting. What can you say in 140 characters or less? “Going to cafeteria for lunch now – thoughts?” It seemed like a restrictive...  Read More »
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A Look Back On 2009 (Before Hazarding Predictions For 2010)

Before I gaze into a crystal ball and add to the many fine predictions already made for the remaining 11/12ths of 2010 (articles by my colleagues Jack Erickson and Richard Goering are my favorites so far); allow me to review my 2009 predictions against...  Read More »
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Low-Power Verification With SystemC - The Great Unknown

Design teams have used C/C++/SystemC reference models for many years and the trend is growing with SystemC synthesis. At the same time, many teams are adding power-aware structures to their designs and trying to simulate. So what happens when the models...  Read More »
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What's Good About SiP Layout ADRC? See For Yourself Using The SPB16.3 Release!

In the SPB16.3 release, the SiP Layout Assembly Design Rules Checker (ADRC) User Interface has been integrated with the Constraint Manager will thereby become consistent with other design rule checks that use Constraint Manager technology. This also means...  Read More »
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Why UVM Does Not Equal OVM Plus VMM

In the numerous tweets, blog posts, and online forum discussions on the upcoming Universal Verification Methodology (UVM) standard from Accellera, I have seen a couple of references along the lines of "UVM=OVM+VMM" and that really concerns me...  Read More »
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Guest Blog: Making Restricted Design Rules Work

Applying restricted design rules (RDRs) to conventional design styles won’t produce good results, says Scott Becker, CEO of Tela Innovations. A better approach, he says, is to start with a restricted design style with regular layout patterns. There’s...  Read More »
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Methodology Is Important But Language Matters - Part 1

Historical trends in languages Many of us have traveled around the world, and while we can often communicate with local people in our own language, we realize it is best to communicate using the local language. It helps to "break the ice" if...  Read More »
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The Evolving Enterprise SSD: Gartner’s Forecasts

By Steve Leibson for Denali Software The appearance of SSDs into the storage arena is rapidly altering the way large-scale, enterprise-class storage systems are built. Gartner Principal Analyst Sergis Mushell discussed some of these changes at the recent...  Read More »
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