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Things You Didn't Know About Virtuoso: Thumbnails

Boy, you must think we're a few sandwiches short of a picnic over here at Cadence. A couple of months ago we came out with this great new Virtuoso software release (IC 6.1.4) . So, despite my best efforts to get you to use the recently-opened files...  Read More »
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Analog Behavioral Modeling - What Language Do You Speak?

An increasing number of mixed-signal design teams are contemplating adding analog behavioral modeling to their repertoire in order to achieve reasonable simulation speeds. Utilizing analog behavioral models can yield simulation performance improvements...  Read More »
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DVCon Panel: Three Ways To Minimize Verification Effort

With verification taking up more and more of the design cycle, is there any hope that verification will keep up with escalating design complexity? Yes, according to panelists at the DVCon conference Thursday Feb. 25. From the discussion, I distilled three...  Read More »
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DVCon 2010 - Day 3

Click here or on the image below to go to the annotated photo blog of DVCon 2010 Day 3. The images and notes include highlights from: A paper on "Where OOP Falls Short of Verification Needs" (And there is also a video interview of Matan elaborating...  Read More »
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DVCon Panel: Why Verification Engineers Are “Sleepless”

I view a panel as successful when I leave the room knowing more than when I came in. Such was the case at the "What keeps you up at night" panel at DVCon Feb. 24, which offered some interesting, provocative, and in several cases surprising perspectives...  Read More »
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DVCon 2010 Rocked!

I've spent much of this week at the San Jose Doubletree Hotel for DVCon 2010 , and I have to say that it was a really good show. This is arguably the most important conference of the year for verification. DAC is lots bigger of course, but DVCon is...  Read More »
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DVCon 2010 - Day 2

Click here or on the image below to go to the annotated photo blog of DVCon Day 2. Photos & notes include highlights from: Brett Lammers' paper on "Apples to Apples HVL Comparison Finally Arrives" Lunch panel on "OVM found the bugs...  Read More »
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Lip-Bu Tan Keynote: Rethinking EDA For 2010 And Beyond

Business conditions are looking up for the EDA and semiconductor industries, but customer concerns have shifted, according to Lip-Bu Tan, president and CEO of Cadence. At a DVCon keynote speech Feb. 24, Lip-Bu described a new landscape in which EDA providers...  Read More »
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What's Good About The Latest Cadence Online Support? Check Out This List!

This past weekend, several new enhancements and features were added to Cadence Online Support . I would encourage all customers to take a quick tour of these productivity enhancements. Below I've included some screenshots and examples of a few of...  Read More »
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DVCon SystemC Day Quandry: Need for Third Party TLM IP

Sometimes in the most optimistic of discussions, there is an "elephant in the room" that people don't say much about. Such was the case at the DVCon SystemC Day Feb. 22, where despite strong attendance and upbeat presentations, there was...  Read More »
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