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New White Paper discusses the challenges of chip design based on AMBA 4

ARM’s series of AMBA specifications have become a de facto standard for SoC (system-on-chip) interconnects. ARM introduced the first version of the specification more than 15 years ago and has now released the latest version of the specification, called...  Read More »
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Memory Market Outlook for 2010: How Bad (or Good) is it?

If you’ve been following the roller-coaster ride that constitutes the global semiconductor memory market, then you’re probably looking over the shoulders of as many memory analysts as possible, trying to find one whose crystal ball isn’t cracked, fused...  Read More »
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What's Good About DEHDL Alignment? You’ve got it in the SPB16.3 Release!

Schematic construction requires a lot of effort in placing components, wires and text/notes in such a way that the end schematic looks neatly organized. Aligning and distributing objects on a schematic can be time-consuming if it has to be done manually...  Read More »
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NVidia Engineer Cites HW/SW Integration Challenges

One of the biggest challenges facing NVidia is the verification of software applications in the context of overall system designs, according to Narendra Konda, director of hardware engineering at NVidia. Konda was a speaker at the Cadence EDA360 introductory...  Read More »
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Informative Tweets on WHEN Inheritance

Earlier today a lively and very instructive thread on the relative virtues of WHEN Inheritance developed on Twitter between @pmarriott (a D&V consultant in Montreal, Canada) , @yaron_think_ver (a verification consultant based in Israel) , and @teamspecman...  Read More »
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What Does EDA360 Mean for Verification Engineers?

I trust that most of you have seen the recent flurry of blog posts and articles about the new Cadence " EDA360 " vision. I was working on a blog entry on how this links to my world of verification when I saw my colleague Jack Erikson post "...  Read More »
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System Realization activities at CDNLive! EMEA this week

CDNLive! EMEA will be held in Munich again this year, and there’s lots of news about Cadence’ offerings to address the productivity gap in Systems Realization. Here are the System Realization activities, customer presentations, and Cadence presentations...  Read More »
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Magnetic nanodot materials breakthrough presages high-density MRAM--possible competition for DRAM and Flash in five years or so?

From North Carolina State University (NCSU) comes news of a materials breakthrough that promises extreme density for magnetic RAM (MRAM) devices, possibly in as little as five years or so. Dr. Jay Narayan, the John C. Fan Distinguished Chair Professor...  Read More »
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More free DAC exhibit tix; One more chance to win an Apple iPad

A bit more than a week ago, this blog carried the news that you could get a free exhibit pass to the upcoming DAC in Anaheim if you work for a semiconductor company, OEM, or a system or service provider in the electronics industry (as long as your company...  Read More »
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Samsung announces imminent release of a multichip module integrating DRAM and PCM for Smartphone applications

Hot on the heels of Numonyx’ announcement of two commercial PCM (phase-change memory) products (see “ Numonyx 128-Mbit serial- and parallel-I/O PCM non-volatile memories now available in volume ”), Samsung announced on April 28 that it plans to ship a...  Read More »
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