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Why The UVM Is Ready For Production Use Today -- Part 3

This is the final installment of my blog posts based on the three common questions I heard at DAC regarding the Universal Verification Methodology (UVM). I've already answered the questions " What does the UVM mean for the future of the OVM and...  Read More »
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Specialty semiconductor foundry TowerJazz licenses “Y-Flash” IP to “leading” digital foundry

TowerJazz, the specialty semiconductor foundry created by the merger of Tower Semiconductor and Jazz Semiconductor in 2008, has announced that it has licensed its “Y-Flash” MTP (multiple-times programmable) CMOS memory IP to an unnamed, “leading” digital...  Read More »
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Brian Bailey: Building Towards A Cohesive ESL Flow

Plenty of niche tools fall under the electronic system level (ESL) label, but putting them together into a cohesive flow has been elusive. At the recent Design Automation Conference, consultant Brian Bailey (and blogger at techbites.com ) described how...  Read More »
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What's Good About Via DRCs In Allegro Constraint Manager? It's In SPB16.3!

Current design technologies require extremely tight matching requirements right down to the overall net topologies to ensure that any deviations in propagation delays are minimized. As a result, design guidelines call for matching the number of vias for...  Read More »
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Will Taiwan Innovation Memory Company (TIMC) become Taiwan’s NAND Flash Inc?

The Taiwan Innovation Memory Company (TIMC) was originally formed as the Taiwan Memory Company (TMC) and was tasked with shoring up Taiwan’s DRAM vendors (Powerchip, ProMOS and Rexchip) and linking up with Japanese DRAM powerhouse Elpida acting as a technology...  Read More »
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Why The UVM Is Ready For Production Use Today - Part 2

In my last blog post , I talked about the three most common questions I heard at DAC from people who had some concerns about moving to the Universal Verification Methodology (UVM). I already addessed the question "What does the UVM mean for the future...  Read More »
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DRAM vendors look to 40nm process technology to keep DRAM profits flowing next year

Taiwan Economic News reports that DRAM vendors will be bringing 4x nm process technologies on line during 2010 and 2011 to keep manufacturing profits up. According to P L Pai, vice president of Nanya Technology, DRAM chip makers are presently climbing...  Read More »
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What Language Is Best For High Level Synthesis?

I was not expecting the last panel on the last day of the Design Automation Conference to be well attended, but it was - along with animated discussions and a long line of audience members waiting to ask questions. It turns out that a lot of people were...  Read More »
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DAC Report: Interview With AMIQ And Update On Their “DVT” IDE

One of the benefits of the Design Automation Conference is the opportunity to follow the growth trajectory of partner companies with each successive show. Last year our long time Verification Alliance partner AMIQ ( a name familiar to many Specmaniacs...  Read More »
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DAC report: Video Interview With Zocalo

One of the benefits of the annual Design Automation Conference is the opportunity for innovative start-ups to make their mark. This year, our partner Zocalo made several " must see lists " for their Zazz platform's ability to make life easier...  Read More »
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