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virtuoso,mixed signal design

  • Re: mixed signal simulation

    thanks for your valuable guidance.... sir, in my project i have designed one block in verilog.Now i need to integrate it to the remaining analog blocks. so i generate verilog netlist of the corresponding digital block. But after integrating it with analog block i need to check functional and transistor...
    Posted to Mixed-Signal Design (Forum) by KUMARJAYA on Thu, Jul 17 2014
  • mixed signal simulation

    is it possible to simulate verilog netlist in cadence virtuoso?how to bind the standard netlist cell to the corresponding code?
    Posted to Mixed-Signal Design (Forum) by KUMARJAYA on Wed, Jul 9 2014
  • Re: Switched Cap based System Noise Analysis

    Hi Andrew, Following are the details- 1) Comparator goes to unity feedback and then openloop - 222.22k 2) There are some caps and they either get connected b/w input of comparator and Supply or Input of comparator and ground- 2MHz 3) There is one switched cap BGREF. When comparator goes in unity feedback...
    Posted to Mixed-Signal Design (Forum) by Abhishek D on Mon, Feb 10 2014
  • Re: Switched Cap based System Noise Analysis

    Hi Andrew, Thank you for being always first to answer. I referred your attachment before putting my query. But this says, it takes only one clock. In my system multiple switchings are happening and that too at different rates. Pardon my ignorance if I am not able to understand the material you attached...
    Posted to Mixed-Signal Design (Forum) by Abhishek D on Mon, Feb 10 2014
  • Support for Low Power Mixed Signal Designs in Virtuoso Schematic-XL

    Why is There a Need for Low Power Solutions? With an increase in the demand for high-performance, multi-tasking systems-on-chips (SoCs) for communication and computing, the power requirements for these electronic chips have also greatly increased. There has been a surge in the production of portable...
    Posted to Mixed-Signal Design (Weblog) by DeveshJain on Tue, Dec 10 2013
  • can we attach technology file to verilog-AMS design

    Hai all I am new to cadence and verilog-AMS i am trying to design ADC circuit completely in verilog-AMS description. i have a doubt that whether we can attach technology file(65nm or 180nm) to this design codes and get the power consumption of the circuit .if any one says yes we can then tell me how...
    Posted to Mixed-Signal Design (Forum) by sunilreddy on Fri, Aug 16 2013
  • Designing Digital FIR Filter using Cadence Tools

    Hello everyone, I am required to design FIR filter using Cadence tools for one of the projects that I am currently doing. I would like to mention that I am very new to this and have never done filter designing in cadence. Even have very minimal experience in Filter design in MATLAB. Thats why I am not...
    Posted to Mixed-Signal Design (Forum) by indra0804 on Wed, Jul 3 2013
  • IBIS model simulation

    I am designing a Data acquisition system with a Texas instruments ADC, Inamps and a ST micro electronics micro controller. I am getting spice models for my inamps, differential amplifiers etc. so that I could do SPICE simulation. I wish to see the output of my ADC if I am providing an input signal with...
    Posted to PCB Design (Forum) by niranjan madha on Wed, Apr 17 2013
  • Mixed Signal Technology Summit Proceedings Now Available

    In September 2012, Cadence held its second Mixed-Signal Summit in San Jose, California. 150 users attended the Summit. The full day program was packed by user presentations. Strong participation and attendance was yet another confirmation of increased design activities in the mixed-signal area. Attendees...
    Posted to Mixed-Signal Design (Weblog) by nizic on Thu, Dec 13 2012
  • Mixed-Signal Technology Summit in Japan Provides Technology Updates

    Japan’s semiconductor industry is undergoing a significant change in recent years. We are seeing a shrinking business in SoC development while design and semiconductor companies are trying to focus more on higher profitable and differentiable products like microcontrollers and power management...
    Posted to Mixed-Signal Design (Weblog) by QiWang on Thu, Nov 29 2012
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