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virtuoso

  • SKILL for the Skilled: Making Programs Clear and Concise

    The SKILL programming language augments Cadence core tool functionality for Virtuoso and Allegro customers. It is also an important development tool for internal Cadence services organizations as well as Cadence product development groups. We see the value, power, flexibility, and elegance of the language...
    Posted to Custom IC Design (Weblog) by Team SKILL on Mon, Nov 8 2010
  • Open Instance connections Assura LVS error

    Simple inverter as a Ring Oscillator Design is DRC clean but the Assura LVS brings up Nets Mismatch Tool...Open Instance Connections... I've tried severval ways to remove error but to no avail. Any insight will be appreciated. attach are the screen shot
    Posted to Custom IC Design (Forum) by jdgriggs on Mon, Oct 11 2010
  • Things You Didn't Know About Virtuoso: ADE XL--Take This Job and...Run It!

    Sometimes these articles just write themselves... Last week, 3 different people asked me questions about the ADE XL Run Options form. Sadly, the odds that 3 people in the same week would ask a question to which I actually knew the answer are vanishingly slim, so that meant I needed to do some research...
    Posted to Custom IC Design (Weblog) by stacyw on Wed, Oct 6 2010
  • Measure Twice, Cut Once for Transistor ft

    Recently there was an inquiry about the methodology for performing the f t (transition frequency) versus Ic measurement described in my Measuring Transistor f t blog post from July 2008: By bid75 on September 8, 2010 I am unable to understand how ft vs. Ic plot is generated. How do you do a nested sweep...
    Posted to RF Design (Weblog) by Art3 on Wed, Oct 6 2010
  • Now Playing: Custom IC Videos-to-Go

    I wanted to take a brief detour from my usual postings to point out a couple of new delivery mechanisms we're trying out for distributing video collateral -- making better use of some of those toobz on the interwebs. First, we've made some of the videos in the CIC Video Library at http://support...
    Posted to Custom IC Design (Weblog) by stacyw on Mon, Sep 27 2010
  • Things You Didn't Know About Virtuoso: ADE XL -- Where Did My Data Go?

    Last week I got to attend a "Social Media Summit" here at Cadence. Jeepers, a "summit." I feel so important. Anyway, being the kind of person I am, one of the things that stuck in my mind was that they told us not to "tweet aggressively." Got it. Should I ever decide to...
    Posted to Custom IC Design (Weblog) by stacyw on Tue, Sep 21 2010
  • cross probing with calibre

    Hello guys, I have a problem with calibre tools. I am working in a special technology and i have just calibre tools to verify my layout. I would like to do a cross probe to verify special net but i don't find how to do that. I don't use layout vxl. Is someone could help me. Thanks michael ps...
    Posted to Custom IC Design (Forum) by layout analog on Thu, Sep 16 2010
  • Things You Didn't Know About Virtuoso: Outputs Setup in ADE XL

    Continuing on our exploration of ADE XL (see here and here for previous articles), today let's take a look at the Outputs area in the center of the screen. Any output signals or expressions which appear in the ADE XL Test Editor (or the ADE L window if you created the setup in there) will show up...
    Posted to Custom IC Design (Weblog) by stacyw on Wed, Aug 25 2010
  • Analog Design vs. Automation -- Why Are They At Odds?

    Back in 2002 and 2003 there was a lot of talk about analog synthesis being the "next new thing" to close the productivity gap between analog and digital designers. Well, I hope you didn't hold your breath for this! That promise failed mostly because analog design was still a custom design...
    Posted to Custom IC Design (Weblog) by Nigel on Tue, Aug 17 2010
  • Have device connectivity added as an include?

    Hi, Presently, the device connectivity portion of the input file is added as a "cat" function where every single line of the device connectivity shows up as a line in the input file. Is there any hidden switch to change the behavior so that the device connectivity shows up as a single .include...
    Posted to Custom IC Design (Forum) by SharksFan on Fri, Aug 13 2010
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