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virtuoso

  • Internal error with topology.c

    Hi, When I try to run a Spectre dc and trans simulation with my 8-bit-adder circuit, have an internal error stopping the simulation. I get the following messages in the spectre log window: 1) the usual "unable to compile ahdlcmi module library" message (which has not stopped my simulations...
    Posted to Custom IC Design (Forum) by CPete on Thu, Jun 2 2011
  • SKILL for the Skilled: Virtuoso Applications of SKILL++

    In this posting, I continue looking at applications of SKILL++. In particular, I'll also discuss how to create functions that hold onto their state. I'll use these functions to implement multiple-criteria (cascading) sort predicates. I'll look at ways to sort layout pins counter-clockwise...
    Posted to Custom IC Design (Weblog) by Team SKILL on Tue, May 31 2011
  • Calculation of Sub Threshold and Gate Leakage Power

    Dear Sir, I am working on 6t SRAM cell and want to calculate Sub Threshold and Gate Leakage power of that. So please help me and tell me the steps to calculate the sub threshold and gate leakage power.
    Posted to Custom IC Design (Forum) by Shyam Akashe on Mon, May 30 2011
  • Q&A: How ClioSoft Keeps IC Design Data Management “Simple”

    IC design engineers want to spend their time designing, not managing files. Cadence Connections partner ClioSoft, a provider of hardware configuration management software, wants to keep it that way by providing easy-to-use tools that work seamlessly with IC design tools including the Cadence Virtuoso...
    Posted to Industry Insights (Weblog) by rgoering on Thu, May 26 2011
  • Jim Hogan Presents Vision of “Democratized” MEMS

    If you work with micro-electrical mechanical systems (MEMS) today, you are probably a highly trained expert. And that's a problem. For MEMS devices to become more prolific in consumer devices, we need to "democratize" MEMS design and integration so it's not confined to a handful of...
    Posted to Industry Insights (Weblog) by rgoering on Sun, May 22 2011
  • Aging simulation with RelXpert and Eldo

    Hello everyone I would like to simulate the aging behavior on circuit-level of the circuits built by bulk-Si CMOS technology. I know that there is a tool named “RelXpert” (combined with UltraSim) in Analog Design Environment (ADE) of Cadence Virtuoso can be used for aging (NBTI and HCI) simulation...
    Posted to Custom IC Design (Forum) by SilentHunter on Sun, May 15 2011
  • TFT and BSIM device equations

    Hello everyone I am working TFT circuit design. According to Virtuoso® Simulator Circuit Components and Device Models Manual Product Version 7.1.1 June 2009, Cadence Spectre and UltraSim simulators support RPI TFT model. The equations of RPI TFT models are listed in the above file. I created the...
    Posted to Custom IC Design (Forum) by SilentHunter on Sat, May 14 2011
  • TFT and BSIM device equation

    Hello everyone I am working TFT circuit design. According to Virtuoso® Simulator Circuit Components and Device Models Manual Product Version 7.1.1 June 2009, Cadence Spectre and UltraSim simulators support RPI TFT model. The equations of RPI TFT models are listed in the above file. I created the...
    Posted to Cadence Academic Network (Forum) by SilentHunter on Sat, May 14 2011
  • Virtuoso Analog Design Environment XL – Embrace the Productivity

    In my last blog, Virtuoso IC 5.1.41 was Good but Virtuoso IC6.1 is Better , I wrote about the improvements in Open Access, SKILL and Virtuoso Schematic Editor in Virtuoso IC 6.1. In this blog, I am going to focus on Virtuoso Analog Design Environment, mainly on Virtuoso Analog Design Environment XL,...
    Posted to Custom IC Design (Weblog) by Rama Jupalli on Fri, May 6 2011
  • Problem in layout with new cadence

    Hello, I am using the new cadence for the first time (IC6.1.5)and I am having a lot of problems with the layout (layout Suite L licence). One of the issues is that every time I create a new path. Once it is drawn, I cannot change its properties. Example: I create a M1 path of 0.5u width and I want to...
    Posted to Custom IC Design (Forum) by MariaOtz on Wed, May 4 2011
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