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Video: A Unified Modeling Flow for Virtual Platforms and High-Level Synthesis
Can the same SystemC TLM2 models be used in virtual platforms and high-level synthesis? Today the answer is typically "no." However, there is a "middle ground" modeling methodology that can turn this "no" into a "yes," according to Stuart Swan, senior architect...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Apr 11 2013
MemCon Panelists Chart Future of Semiconductor Memory
Density, power, bandwidth, latency - all of these memory attributes will improve during the next few years, according to panelists at the MemCon 2012 conference Sept. 18. But don't underestimate the challenges, don't expect to replace NAND and DRAM, and forget about the dream of a "universal"...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Sep 26 2012
Free UVM Tutorial Boosts IC Functional Verification Skills
Whether you're new to the Universal Verification Methodology (UVM) or an experienced user who wants to know more, a free on-line tutorial will help you improve your IC verification skills. The half-day tutorial, titled " UVM: Ready, Set, Deploy! " is available through the Accellera Systems...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Sep 12 2012
Lessons for EDA When Low Power vs. Heat Dissipation Isn’t a Fair Fight: A Case Study With the GoPro Hero2 Camera
Right up there with functional verification, the challenges of low power design and verification present an existential threat to our customers' products, and ultimately their businesses. Clearly both sides of the low power coin -- reducing generated heat and/or increasing efficiency to make the...
Posted to
Functional Verification
(Weblog)
by
jvh3
on Wed, Sep 12 2012
The Cowbell Rings On – We Have Completed the “UVM SystemVerilog Basics” Videos in Chinese
In July we released 12 videos of the UVM SystemVerilog Basics series with Chinese audio . Now we are completing the set and releasing the remaining 13 videos. Interface UVC Environment Virtual Sequencer - Sequence Module UVC Scoreboard DUT Functional Coverage Testbench Test Configuration Factory Phases...
Posted to
Functional Verification
(Weblog)
by
Axel Scherer
on Tue, Sep 4 2012
Report From Silicon Valley With Application Engineer Bin Ju
Luckily I was able to track down my very busy colleague Bin Ju between assignments and interview her about her first-hand observations of what's going on here in Silicon Valley today. Bin is an expert on formal and assertion-based verification (ABV), so her remarks focus on the trend toward increasing...
Posted to
Functional Verification
(Weblog)
by
TeamVerify
on Tue, Aug 21 2012
Cadence Video Demonstrates PCIe Gen3 IP Silicon Performance
It is not often that an IP provider gets to showcase their IP performance in a real product demo. Those laurels usually end up going to the end product that uses the IP. But a recent Cadence video features our PCI Express (PCIe) Gen 3 core running flawlessly in silicon in a real system. We thought we...
Posted to
Design IP
(Weblog)
by
ashwinmatta
on Mon, Aug 6 2012
Constrained Random Test Generation In e [IEEE 1647], Ernie * Duracell ≈ Infinity Minus
Ernie & Duracell "I feel great" - long pause - "I feel great, I feel great". 6 weeks later: "I feel great, I feel great, I feel great" - pause - "I feel great". I hear this sound coming out of my son's room. What is going on in my house? Is there such a...
Posted to
Functional Verification
(Weblog)
by
Axel Scherer
on Wed, Aug 1 2012
Video: Enabling Next-Generation DRAM with DDR4, LPDDR3, and Wide I/O
If you want low-power, high-bandwidth access to off-chip DRAM, you're going to have to do some creative design work. A recent video presentation provides a good overview of some of the challenges, and shows how more intelligent memory controller and PHY IP is needed to support next-generation standards...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Aug 1 2012
Video: Interview with Professional Teenage Technology Coach Kristine Bonhoff
Over the past several years at various EDA trade events, one of the more popular forums have been panel discussions and interviews asking teenagers about the technology in their daily lives. However, those forums have been comprised of amateurs, whereas in this interview I've secured a professional...
Posted to
Functional Verification
(Weblog)
by
jvh3
on Tue, Jul 31 2012
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