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  • What's Good About Allegro PCB Router HDI Via Tangency? Check Out 16.5!

    High Density Interconnect (HDI) techniques are increasing in the PCB domain. HDI provides the ability to place components on both sides of the board and helps reduce the PCB layer stack. Allegro PCB Router started evolving in this direction from the SPB16.2 version with drill holes and microvias. In...
    Posted to PCB Design (Weblog) by Jerry GenPart on Wed, Oct 5 2011
  • Re: Error in addvia code

    Hello Andrew Thanks for looking into the code. I reran the script after making the changes suggested by you. However, now the vias placed by calling the addVia() function retain the values of the last placed via. For e.g. if a TV was placed before placing a Via2/Via3, then the via2/via3 would be placed...
    Posted to Custom IC SKILL (Forum) by brittooo on Mon, Sep 12 2011
  • Error in addvia code

    Hi I would really appreciate if you could take a look at my code copied below and let me know the reasons for the 2 bugs mentioned: ;PROCEDURE TO ADD VIA1,VIA2,TV AT THE DESIRED POINT IN THE LAYOUT ;AUTHOR:SwK ;CREATED:8 SEP 2011 ;*********************************************************************...
    Posted to Custom IC SKILL (Forum) by brittooo on Thu, Sep 8 2011
  • Function to get techfile via parameters

    Hi all I require the tech file via parameters in my script. Is there any function or code available to do the same? I am working on IC5141. Regards Brittoo
    Posted to Custom IC SKILL (Forum) by brittooo on Wed, Sep 7 2011
  • What's Good About Allegro Router and Highlighting? You’ll need the SPB16.3 Release to See!

    Just a quick post this week on a new Allegro PCB Router feature in the SPB16.3 release. A small feature, but very useful! Highlight/Unhighlight bbvias The following command is accessible in SPB16.3 SPECCTRA to highlight/unhighlight selected kinds of blind and buried vias ( bbvias ): highlight <object_type>...
    Posted to PCB Design (Weblog) by Jerry GenPart on Wed, Feb 16 2011
  • ncdrill problem

    I am using Allegro 16.2. I have problem with ncdrill, when I launch the command ncdrill un error occured and the program stopped. It created a log file ( extract.log). In the file there is this error : ERROR(SPMHDX-9): Internal error ... too many field names. I try to check all the pad,I try to remove...
    Posted to PCB Design (Forum) by Maury on Fri, Feb 11 2011
  • What's Good About Allegro Measure, Grids and Formulas? See For Yourself in SPB16.3!

    This week, I’m tossing together a mix of a few new SPB16.3 Allegro PCB Editor features. Show Measure any Layer In the SPB16.3 release, the show measure ( Display — Measure ) command now measures the separation between any two objects regardless of the layer. For padstacks, the active layer...
    Posted to PCB Design (Weblog) by Jerry GenPart on Wed, Feb 9 2011

    Hi All How to bring in newly added via pads in allegro 15.2 version? I created 12/24 & 24/40 via padstacks and added it to library and updted my pad path& psmpath After this i don no how to proceed to bring via in Can anyone reply me soon. Regards ARFAJ SANDS
    Posted to PCB Design (Forum) by Anonymous on Wed, Dec 1 2010
  • What's Good About Allegro Router and Via Changes? SPB16.3 Has a Few New Enhancements!

    This week, I’ll be closing discussions on the new SPB16.3 Allegro PCB Router improvements. The focus is on several enhancements for via support. The Use_Via Rule Many times you need to restrict the usage of specific vias in a region. Allegro PCB Router has been enhanced in the SPB16.3 release to...
    Posted to PCB Design (Weblog) by Jerry GenPart on Wed, Oct 20 2010
  • Thermal Relief - Vias

    Hello, New to PCB designer...although learning. I am using a 2 layer board. The bottom is a ground plane. I am unable to get the via to display the thermal relief etch that the other connector holes are as seen in this picture: The connector footprint has a nice cross going into the contact while the...
    Posted to PCB Design (Forum) by JBmtk on Wed, Jul 7 2010
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