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  • Re: How do you control what layer a via connects to?

    In the constraint manager, would I go to Physical > Net > All Layers and then set it for the wire I'm interested in under the "Via" column?
    Posted to PCB Design (Forum) by Oscilliscoper on Mon, Jun 10 2013
  • How do you control what layer a via connects to?

    Another very basic and stupid question, I'm sure: How do I control what layer a via is connected to? I know that when laying down wires, you have to double click to make a via, but that makes a via from the top layer to the bottom layer or vice versa. How can I change the via to be from layer x to...
    Posted to PCB Design (Forum) by Oscilliscoper on Sun, Jun 9 2013
  • Power Stripe - Power Via Generation in Encounter

    I am trying to use a power ring, special routing, and power stripes for my power routing. I can set up the ring, special routing, and stripes correctly as far as location is concerned. However, I am having spacing violations in Encounter (and after exporting to Cadence using oaout) where it places power...
    Posted to Digital Implementation (Forum) by bsparkma on Wed, May 22 2013
  • Forcing via connections

    I have a multi-layer design with multiple ground plane layers. But these have issues with ground loops. How can I set something in PCB Editor 16.5 that will only connect vias to one ground plane layer and leave all other layers unconnected, so that I can use a single ground connection point.
    Posted to PCB Design (Forum) by tmd63 on Fri, May 3 2013
  • How do I create a stack of vias

    We sometimes need to define a thruhole via as a stack up of blind microvias and buried vias. This is becasue on th eTop and Bottom layers I need a smaller pad, that cannot be acieved with thruhole via, but only with blind micorvias. Is it possible in PCB Editor to define such a via, or at least to place...
    Posted to PCB Design (Forum) by Leticia on Fri, Apr 5 2013
  • How to assign/update an etch objects' net

    Unaware I was in the wrong forum, I've been posting this PCB layout question in the Digital Implementation forum http://www.cadence.com/Community/forums/p/23378/1322026.aspx#1322026 I am trying to take a group of pre-selected vias and change the net that they are on. My inquiry is as follows: Apparently...
    Posted to PCB Design (Forum) by RaylonS on Thu, Mar 28 2013
  • What's Good About PCB SI and Vias? 16.6 Has Many New Enhancements!

    In the Allegro PCB SI 16.6 release, vias in SigXp have been enhanced to make it more efficient for design use. In addition, Allegro PCB Editor padstacks will be used to build the models. Read on for more details … Adding Vias Adding a via is easier and faster than before. You no longer have to...
    Posted to PCB Design (Weblog) by Jerry GenPart on Mon, Mar 25 2013
  • update "cutSpacing" of a via

    Hi guys, Long time lurker, first time poster. I first want to thank Andrew, Lawrence and other regulars for contributing to this forum. I have a simple problem that I can't seem to figure out and I am hoping you guys can point me to the right direction. I am trying to update the "cutSpacing"...
    Posted to Custom IC SKILL (Forum) by chianga on Tue, Dec 18 2012
  • What's Good About APD’s Shape Shorting? You’ll Need the 16.6 Release to See!

    In some designsflows, you need to connect two plane shapes on the same net, but on different layers, together with vias in order to improve connectivity. These “shorting” vias are placed in a regular pattern across the overlapping areas of the shape, in such a way as not to interfere with...
    Posted to PCB Design (Weblog) by Jerry GenPart on Tue, Nov 13 2012
  • What is the best way to create a GSSG differential via structure?

    I would like to use GSSG differential via structure for the 10G Serdes signal routing. What is the best way to implement GSSG differential via structure? How to make a oblong shape Anti pad for the two differential vias? Look forward to your help. Thanks.
    Posted to PCB Design (Forum) by Xu Zhou on Thu, Oct 25 2012
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