Home > Community > Tags > veriloga/Cadence
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

veriloga,Cadence

  • Noise sources in PSS analysis

    Hi all, I have a pretty simple doubt. I am using Verilog A based circuit netlist to perform circuit simulation in cadence spectre. I have defined some flicker noise sources in the same netlist. If I simulated a simple differential amplifier, I can get the inut referred noise through noise analysis. Now...
    Posted to Custom IC Design (Forum) by OneNewBoy on Tue, May 14 2013
  • Re: Problem in Cadence Virtuoso AC analysis

    Hi Andrew, I had a little doubt on what parameters are explicitly needed for ac analysis. This is because I am using verilog -A based models and hence want to be sure if I am doing the right thing. As far as I know, AC analysis first computes the DC operating point: so I must define current at each operating...
    Posted to Custom IC Design (Forum) by OneNewBoy on Mon, Mar 25 2013
Page 1 of 1 (2 items)