Home > Community > Tags > transient analysis
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more convenient.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).


* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

transient analysis

  • Help with complete understanding of "vsin" source in Cadence

    Hi. I kind of thoroughly Googled before posting this question for seeking help from you guys! The "vsin" source (in analogLib) of Cadence has many parameters: i) AC magnitude, AC phase, DC voltage ii) Offset voltage, Amplitude, Frequency,... Question 1: Internet resources are indicating that...
    Posted to Custom IC Design (Forum) by jdp721 on Sun, May 11 2014
  • Transient analysis error: "too few group members"

    Hello, I'm trying to run a transient analysis in ADE in Cadence to verify functionality of a digital circuit imported from a Synopsis flow, but I'm encountering the following errors: "Error happens when writting waveform for write error on PSF file" "Error happens when writing...
    Posted to Custom IC Design (Forum) by Phylosics on Fri, Apr 25 2014
  • Convergence error in Transient analysis

    Actually i crated a Memristor Model by using VerilogA code. Then i designed logic gates by using the same with different methodology and i got correct simulated output but when i combined all individual logic gates to make a simple 1 bit adder then i got convergence error. I did simulation for 40n sec...
    Posted to Custom IC Design (Forum) by SAMEERGARG on Sun, Apr 20 2014
  • Transient Simulation 1/f noise

    Hello, I have a simple question: when running transient analysis, is it possible to include 1/f noise in the signal output? I thought that it was only possible using the non-transient noise analysis, but I ran across this on this site, which made me actually sign up and post this question: Pedro, To...
    Posted to Custom IC Design (Forum) by kangjh7 on Thu, Feb 20 2014
  • New Book: Analog Design and Simulation Using OrCAD Capture and PSpice

    Thousands of engineers worldwide use OrCAD Capture for PCB schematic entry and PSpice for circuit simulation. These popular products, both provided by Cadence, deserve a good "how to" book -- and now they have one. It's titled " Analog Design and Simulation Using OrCAD Capture and...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Feb 20 2013
  • transient analysis for CV plot

    Hi everyone, I want to maka a CV plot of MOSFET capacitances. By using ac analysis this is easy. The problem is that i want to keep all dc sources because they are used to bias some other controlling part of circuit. In essense I want to do transient analysis and sweep a dc source at the same time. How...
    Posted to Custom IC Design (Forum) by soathana on Wed, Oct 24 2012
  • transient noise spectre

    Hi all. In transient analysis there is an option for taking into account noise. Which noise components for a MOSFET are being taken into account (ie channel thermal, 1/f etc) or this is model dependent (ie BSIM4 noise parameters supplied). What exactly noise contibution is supposed to do? For example...
    Posted to Custom IC Design (Forum) by soathana on Thu, Oct 18 2012
  • Transient Noise Analysis for clocked circuit and % of contribution of each components at arbitrary time

    Hi All, I want to perform noise analysis for my clocked comparator where the input voltages (inp,inn) vary from cycle to cycle. As a result the conditions of the input MOSFETs change. Therefore the noise contribution also changes as it depends on the saturation level (region of operation) and temperature...
    Posted to Custom IC Design (Forum) by Apolama on Thu, Sep 20 2012
  • Transient simulation taking too much memory

    Sir, I have to run a transient simulation of a transistor-level Charge Pump PLL. I have noticed that it is taking too much memory. icfb got shutdown by itself with this message at the terminal: ERROR: Unable to allocate memory for transition file slice variable transition index level (read). The simulation...
    Posted to Custom IC Design (Forum) by vshssvs7 on Wed, May 30 2012
Page 1 of 1 (9 items)