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  • verilog-a - model ac biasing

    Is there a way to probe simulator as to the biasing conditions of a model implemented in verilog-a ? If not is this possible through verilog-a, via some kind of monitoring scheme or someone must go into spice netlist level? The simulator used is spectre. kind regards, Sotiris
    Posted to Custom IC Design (Forum) by soathana on Thu, May 10 2012
  • Re: zvcvs parameters for S&H, in ac, implementation

    Hi Agaurav, If you are not getting an answer on the forum, I recommend contacting Cadence Customer Support at http://support.cadence.com and filing a Service Request. Best regards, Tawna
    Posted to RF Design (Forum) by Tawna on Tue, May 1 2012
  • Running Cadence IC on VMware?

    My IT department is very enthusastic about putting everything on VMware. They say that this will make their job much easier. I would like to know if you, anyone, or your company has tried running Cadence IC, ADE, or Virtuososo (any version) on VMware and how it worked out for you.
    Posted to Custom IC Design (Forum) by John Reeder on Fri, Apr 6 2012
  • spectreVerilog

    Hello, I have being using spectreverilog tool to run some mixed signal sims. When I try to run pvt sims using ocean environment,the sims run fine but it looks for a license pair afresh as it is about to start the second PVT sim. It does not use the same set of spectre and verilog license it had acquired...
    Posted to Custom IC Design (Forum) by uzzy on Tue, Apr 3 2012
  • High frequency quadrature VCO design with good phase noise

    Hello everyone I am a newbie engineer starting my career in RF IC design and working on designing a high frequency VCO (38 GHz) with good phase noise characteristics. I am using Cadence IC6.1.5-64b.500 version and spectre simulator for the schemtic design and simulations. I have to do everything from...
    Posted to Custom IC Design (Forum) by rohan kr on Thu, Mar 29 2012
  • Transient noise

    Hi , What does the transient noise tab in the analyses window of spectre means and what were the values should be given for noise max. ,noise min and bins if my oscillator is working at 450MHzand running for 150ns. Thanks in advance. with regards, Jithin
    Posted to Custom IC Design (Forum) by Jithin on Wed, Mar 21 2012
  • Noise Analysis

    Hi, What does CDF parameters 1. noise file name 2. number of noise/frequency pairs in the properties of source indicates and how does the value for each be given when noise analysis is done.Please quote with an example if my square wave running at a frequency of 450MHz and having a supply voltage of...
    Posted to Custom IC Design (Forum) by Jithin on Wed, Mar 21 2012
  • SpectreRF AppNotes and Tutorials....Still One of our Best Kept Secrets!

    Some of you may remember the blog written several years ago " Shhhhh...SpectreRF Tutorials and AppNotes - One of Our Best Kept Secrets ". Well, the more things change...the more things stay the same! The location of these tutorials and appNotes still seems to be one of our best kept secrets...
    Posted to RF Design (Weblog) by Tawna on Mon, Jan 16 2012
  • Measurement of Duty Cycle Distortion (DCD) using OCEAN

    Hi, Is there any suggestive method for measuring Duty Cycle Distortion (DCD) by Cadence? I could see different suggestions over the Internet on this; for example, feeding the design with a clock-pulse and finding the difference between time periods of clock cycles. What would Cadence suggest? Since this...
    Posted to Custom IC Design (Forum) by LeJonT on Wed, Jan 11 2012
  • Nport Application Note has been Updated and Re-Released

    Happy New Year! After many requests, I set aside some time and updated the Using the nport in Spectre and SpectreRF Simulations appNote for MMSIM 11.1. You may download the appNote on Cadence Online Support . More nport enhancements are planned, so stay tuned! If you have any comments or questions, please...
    Posted to RF Design (Weblog) by Tawna on Tue, Jan 3 2012
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