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spectre

  • Import spectre netlist

    Hello all, I have to look for real differences of subcircuits in two spectre netlists. It should be the same circuit, but the names of the nets and instances seemes to be compleetly different. My idea is to cut out the parts of the subcircuits definition, import them to a cell (IC5.141) and use the LVS...
    Posted to Custom IC Design (Forum) by Bernd das Brot on Fri, Jan 8 2010
  • NPORT S-Parameter Model Enhancements

    In MMSIM 7.2, two new parameters have been added to the Spectre nport primitive: datatrunc and causality . In MMSIM 7.1, passivity checking was added. The nport now has causality correction, passivity checking and enforcement, and the ability to remove small couplings terms from the input s-parameter...
    Posted to RF Design (Weblog) by Tawna on Wed, Dec 30 2009
  • save currents in a spectre netlist, run the netlist in batch mode and the currents is saved as instance_name:number

    To save current into port "A" of instance "IDRIVER", I add the following line in the spectre netlist. save IDRIVER:A Then, I run the netlist in batch mode. After simulation is finished, the result browser shows IDRIVER:2 instead of IDRIVER:A. How can I make the simulator save current...
    Posted to Custom IC Design (Forum) by ckseok on Tue, Dec 29 2009
  • .csv output in Spectre

    What is the easiest way to generate .csv format output in Spectre?
    Posted to Custom IC Design (Forum) by dmckenney on Thu, Dec 3 2009
  • User Interview: An Under The Hood Look At PDKs

    Well-made process design kits (PDKs) are critical for successful IC design, and design teams should keep in touch with PDK technology development, according to Kristin Liu, principal CAD engineer at National Semiconductor . In an interview at the recent CDNLive! Silicon Valley , she talked about the...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Oct 22 2009
  • ams: simulating design with spice netlist with bus ports

    I try to run ams simulation with UltraSim solver a block (let's call it A) containing block (B) described as a spice netlist. Block B has several bus inputs and during elaboration I receive error message: "Vector net cannot be connected to a Spice/Spectre instance by port name". Really...
    Posted to Custom IC Design (Forum) by Runner on Mon, Sep 14 2009
  • Spectre SFE-874 Unexpected CPP_LANG_SWITCH

    Hello, I am getting the error "SFE-874 Unexpected CPP_LANG_SWITCH" with version 7.1.1 of Spectre. I cannot find documentation on this error anywhere. Also, this does not seem to be related to a "simulator lang = spectre" call. Is anybody familiar with this error message? Thanks, Dan
    Posted to Custom IC Design (Forum) by danielmo on Sun, Jul 19 2009
  • Problem with Simulating Design using Spectre

    I have created a schematic using Virtuoso 6. When I open the ADE, it says "(deLicense-7) Could not get a license for ADE L. Would you like to try to get a higher-tiered license to run this product?" When I click on Yes, it starts the ADE, but when I set up the analysis and click on "Netlist...
    Posted to Custom IC Design (Forum) by govilv on Thu, Jun 4 2009
  • Porting EDA Applications to Multicore - Part 3

    It’s easier to build a multi-threaded application from the ground up than it is to go back and rewrite legacy code – but multi-threading still raises a number of tough challenges. The Cadence Space-Based Router is a case in point. Previous posts in this series looked at the challenges involved...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Jun 3 2009
  • voltage probe in Spectre bsource statement

    I have scoured these forums and the online guides and manuals for every bit of information on Spectre behavioral modelling with bsource, yet I've failed to come across any hint as to why I am having this problem. I am using Cadence release IC5141 icfb.exe version 5.1.0 , CMOS IC Design Environment...
    Posted to Custom IC Design (Forum) by Kalimero on Mon, May 18 2009
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