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spectre

  • Video Demo -- Increase Simulation Accuracy and Efficiency With SpectreMDL

    Measurement Description Language (MDL) is an immensely powerful feature in our simulators that is frequently overlooked. MDL gives the designer advanced control of our simulators allowing them to run better simulations quicker. Below is a quick demo to get you started. Also, be sure to try out the workshop...
    Posted to Custom IC Design (Weblog) by AMSamirj on Tue, Nov 23 2010
  • Virtuoso APS Supports RF Analyses in MMSIM 7.2 and MMSIM 10.1

    A new multi-threading capability has greatly improved simulation speed for RF Designers! In MMSIM7.2, we introduced APS for Harmonic Balance analyses (multi-threaded harmonic balance simulation). In MMSIM10.1, we added support for APS in Shooting PSS and small signal analyses (multi-threaded shooting...
    Posted to RF Design (Weblog) by Tawna on Fri, Oct 29 2010
  • dcOP Operation Region and Device Checks

    Hi there I'm quite new to Spectre (have used other simulators in the past) and I'm currently trying to set up a dcOP simulation with Spectre including checks of the operation region. The enviroment installed is IC6.1.3 500.11 and MMSIM 7.1 ISR11. Fighting my way through the GUI I stumbled right...
    Posted to Custom IC Design (Forum) by baenisch on Wed, Oct 27 2010
  • Noise analysis on dynamic comparator

    Hi,there I am using cadence IC5141 usr6 and MMSIM72. I want to know the noise performance of my circuit,a dynmic comparator contains a pre-amp followed by latch. I select noise analysis in ADE,sweep the frequecny from 1 to 10G,output noise I choose voltage,and select Pos.&Neg. differential output...
    Posted to Custom IC Design (Forum) by minci on Sat, Oct 2 2010
  • Multiple Model Files

    Hi, I am working on a circuit where I need multiple model files. The first one I am using is gpdk045, I tried modifying this file to use with transistors from the analog library. The problem I have is that my simulations are wrong whenever I use a transistor with the second model file it just produces...
    Posted to Custom IC Design (Forum) by Karo on Wed, Jul 21 2010
  • Re: using nport in Verilog-AMS

    Hi Tobias, With regards to setting your path, you may want to look at the following Solution: http://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin:ViewSolution;solutionNumber=11066876 Note that this is for the n2port...it will be the same for the nport. In fact, you should use "nport" instead...
    Posted to Custom IC Design (Forum) by Tawna on Fri, May 28 2010
  • Re: using nport in Verilog-AMS

    I suspect it's the way you are defining the path in the file parameter. Try using a full path, rather than relative path. Also, it's good practice to designate your s-parameter files as mydevicesparam.s3p (or .s2p, .s4p, etc.). Not a big deal, but if you later want to plot those s-parameters...
    Posted to Custom IC Design (Forum) by Tawna on Thu, May 27 2010
  • Re: Transient simulation with noise

    Hi Vijay, Have you seen the Transient Noise appNote on Cadence On-Line Support? http://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin:DocumentViewer;src=wp;q=ApplicationNotes/Custom_IC_Design/TrnoiseAN.pdf best regards, Tawna
    Posted to Custom IC Design (Forum) by Tawna on Wed, May 26 2010
  • New Time-Saving Feature in IC6.1.4 ISR2: Plot S-Parameter Data Directly From ViVA!

    If you haven't heard about it....there is a new feature in IC6.1.4 ISR2 which makes troubleshooting circuits containing nports ( s-parameters ) much easier and faster! Starting i n IC6.1.4 ISR2, you can now plot s-parameters directly in ViVA (without having to create a test bench and run a Spectre...
    Posted to RF Design (Weblog) by Tawna on Thu, May 20 2010
  • Re: VerilogA Problem in MMSIM-7.1

    Hi !! I'm having a problem when trying to simulate a verilogA block. Gcc seems to be correctly installed and detected by MMSIM. We're using MMSIM 7.11 and IC5.1.41 (Cadence 2009-2010 IC package - icfb 5.1.0 subversion: 5.10.41.500.6.137) within Linux Fedora 11 and with TSMC 0.18um Design Kit...
    Posted to Custom IC Design (Forum) by Winglet on Fri, May 14 2010
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