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  • Dynamic Power Management – Closed Loop Voltage Scaling

    This posting is part of a series of blogs on dynamic power management in digital-centric mixed-signal verification environments. In this post, I'll discuss open-loop and closed-loop voltage scaling. In previous blogs, I covered some of the following topics: Basics of dynamic power management Very...
    Posted to Low Power (Weblog) by Neyaz on Tue, Aug 24 2010
  • Multiple Model Files

    Hi, I am working on a circuit where I need multiple model files. The first one I am using is gpdk045, I tried modifying this file to use with transistors from the analog library. The problem I have is that my simulations are wrong whenever I use a transistor with the second model file it just produces...
    Posted to Custom IC Design (Forum) by Karo on Wed, Jul 21 2010
  • Name on .ENDS does not match .SUBCKT

    Why I am getting error message " Name on .ENDS does not match .SUBCKT" when I change parameters of an IC or transistor? Every subcircuitry has its ENDS.
    Posted to PCB Design (Forum) by 1PS1 on Wed, Jun 23 2010
  • NVidia Engineer Cites HW/SW Integration Challenges

    One of the biggest challenges facing NVidia is the verification of software applications in the context of overall system designs, according to Narendra Konda, director of hardware engineering at NVidia. Konda was a speaker at the Cadence EDA360 introductory event at the San Jose Tech Museum April 27...
    Posted to Industry Insights (Weblog) by rgoering on Wed, May 5 2010
  • Wind River Partnership Links Virtual Prototypes To RTL

    There's an important message behind a partnership that Cadence and Wind River announced April 27 - virtual prototypes don't have to stand apart from the rest of the design flow. The partnership promises to build a bridge between virtual prototypes and the RTL implementation and verification environment...
    Posted to Industry Insights (Weblog) by rgoering on Mon, May 3 2010
  • Acceleration And Emulation – Why HW/SW Integration Needs Both

    Early software development on software virtual prototypes is a great capability, but at some point hardware/software integration requires the accuracy that only real hardware can bring. When that occurs, there are three choices - acceleration, emulation, and FPGA prototypes. Even though we are accustomed...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Apr 26 2010
  • Panel: What Embedded Software Gurus Think About EDA

    Now here's a novel idea - organize an EDA Consortium panel composed entirely of panelists from outside the EDA industry. That occurred April 15 at Cadence headquarters in San Jose at the EDA Consortium 2010 spring meeting . At this meeting John Bruggeman, Cadence CMO (and former head of marketing...
    Posted to Industry Insights (Weblog) by rgoering on Sat, Apr 17 2010
  • FinFET model parameter

    I have a FinFET model parameter and I need to use to simulate a circuit. How can I do it? Should I only change the file extension from .pm to .scs and copy it where everything else is? Or should modify the existing file? And any idea where can I get 22nm MIGFET model? Thanks
    Posted to Custom IC Design (Forum) by Saeed Gharagoz on Sun, Apr 11 2010
  • Subcircuit Newbie question

    I am having a problem implementing a subcircuit. Everytime I run the simulation I get the following warning: "WARNING [NET0093] No PSpiceTemplate for TRANSORB, ignoring" The subcircuit I would like to implement is a circuit for a transorb that I found here: http://www.orcad.com/documents/community...
    Posted to PCB Design (Forum) by ACENGR on Wed, Feb 10 2010
  • How to identify version of simulator?

    Guys, In IC ver 610 , how to identify the version of simulator installed? and also list of simulators available? Please propose some easy way since I'm beginner in this software. Thank you very much. regards, M.Kumar
    Posted to Custom IC Design (Forum) by KumarMK on Wed, Feb 10 2010
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