Home > Community > Tags > signoff/ARM
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

signoff,ARM

  • DAC 2013 Panel: Where’s the Innovation in Timing Signoff?

    Has there been enough innovation in timing signoff? Probably not, given the enormous amount of time that timing signoff and closure can take, especially at advanced nodes where there can be hundreds of multi-mode, multi-corner (MMMC) timing views. At the Design Automation Conference ( DAC 2013 ) Monday...
    Posted to Industry Insights (Weblog) by rgoering on Thu, May 30 2013
  • ARM TechCon: Inside Story of a 14nm FinFET Tapeout

    The next frontier in semiconductor design is the 14nm process node, and it will come with a new type of transistor, the FinFET. 14nm FinFET technology moved closer to reality at the ARM TechCon conference Oct. 30, 2012, where a Cadence sponsored technical session announced a 14nm test chip tapeout using...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Oct 31 2012
  • 12 Hot EDA Topics – 78 DAC Demo Sessions

    Whatever your role in the chip or system design process, there is probably a Cadence demo geared to your interests at the Design Automation Conference ( DAC 2012 ) June 3-7 in San Francisco. Cadence has three demo suites at its booth (#1930) and is running one-hour demos from 10:00 am to 5:00 pm Monday...
    Posted to Industry Insights (Weblog) by rgoering on Thu, May 24 2012
Page 1 of 1 (3 items)