Home > Community > Tags > power
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more convenient.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

power

  • Leakage Power and National Security

    I read an interesting article recently on EDN regarding a new way to determine cryptographic keys using leakage power. Differential power has long been documented to be a method of cracking keys. In this paper, the author, Milena Jovanovic of the University of Montenegro demonstrated that leakage power...
    Posted to Digital Implementation (Weblog) by Rich Owen on 10-09-2009
  • RC Design Explorer: Find the Right Balance of Power and Performance

    By Paul Weil Sr. Product Engineer You might be aware that RTL Compiler has had the ability to synthesize top-down to multi-supply multi-voltages (MSMV) and optimize across them. Lowering voltage levels can be a great way to reduce switching power, but it comes at the cost of reducing performance. As...
    Posted to Logic Design (Weblog) by Team FED on 07-24-2009
  • Don't Let Power Kill Your Project - What % LVT Should I Use?

    By Diego Hammerschlag Sr. Technical Leader Team FED A common question or requirement that designers have is the percentage of low voltage threshold (LVT) cells that should be allowed in a design. For those not familiar with LVT cells, they are special cells that have a lower voltage threshold and can...
    Posted to Logic Design (Weblog) by Team FED on 05-13-2009
  • The Register's Desktop Integrated Graphics Shootout

    The Register recently did a pretty exhaustive test of the latest generation of graphics chips, working with different processors. The results were pretty interesting, but a couple things jumped out at me. First, I realize that for these chips it's all about performance, but they range from 50-100W...
    Posted to Logic Design (Weblog) by Jack Erickson on 01-20-2009
  • What Was Cool at CES?

    First off, let me wish you all a very Happy New Year. I hope 2009 brings fun and success to everyone. Second, I’d like to apologize for the lag in my posts. My loyal readers (thanks Mom!) have been wondering why I went quiet. Nothing dire; it just snowed. You see, I live in Seattle, and even though...
    Posted to Logic Design (Weblog) by Rich Owen on 01-12-2009
  • Consider the system

    This may be slightly outside the scope of logic design, but since reducing power consumption is something that we are all concerned with, I thought this was interesting. Check out the power consumption of various electronic products, in-use, “off”, and idle: Nintendo Wii Microsoft Xbox 360...
    Posted to Logic Design (Weblog) by Jack Erickson on 10-17-2008
  • Where are all the people? Are conferences dying?

    I love attending ASIC and EDA related conferences (even if it's just for a short time with a free exhibit pass) to check out what's happening (like the latest EDA start-ups, hot IP cores, and keep them in mind in case I jump ship for the greener pastures ... just kidding ... I think :) ) and...
    Posted to Logic Design (Weblog) by Kenneth Chang on 10-03-2008
  • A blog for the adults

    Welcome to my blog – I hope you find it useful, or at least entertaining. My background is that I did chip design for 16 years before entering the EDA biz. I focused on front end design, doing RTL coding, testbench development, synthesis, and working with the place and route teams. As I moved along...
    Posted to Logic Design (Weblog) by Rich Owen on 09-26-2008
Page 8 of 8 (78 items) « First ... < Previous 4 5 6 7 8