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power,Industry Insights
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CDNLive! Keynote – New Horizons for ARM Based SoCs
30 billion ARM-based chips have shipped over the last 20 years, but ARM isn't stopping there. ARM is looking beyond cell phones and mobile devices and pursuing new opportunities in the server, home entertainment, and automotive marketplaces, according to Tom Lantzsch (right), executive vice president...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Mar 15 2012
EDA CEOs Speak Out: 3D-ICs, IP Integration, Low Power, and More
What's driving the EDA industry today and where is it headed in the near future? Some high-level answers to these questions came from the EDA Consortium (EDAC) annual CEO Forecast panel Feb. 29, 2012. EDA industry leaders shared their views about 3D-ICs, SoC integration, power management, industry...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Mar 5 2012
Webinar Report: Power-Aware Mixed-Signal Verification
Most of the discussion about low-power design techniques has focused on digital circuits. However, nearly all systems-on-chip (SoCs) are mixed-signal, and the way in which analog and digital circuitry interact has a huge impact on overall power consumption. Thus, low power (or "power aware"...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Jan 25 2012
Webinar Report: Solving Mixed-Signal Power Grid Challenges
Complex analog/mixed-signal ICs pose many power grid design and analysis challenges. Unanticipated IR drop and electromigration problems are commonplace, and they significantly impact circuit behavior. But as a recently archived webinar shows, there are a number of ways to minimize these problems, even...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Jan 11 2012
Synthesis User Panel: Power Dominates Front End Design
What challenges are users facing in front-end IC design these days? According to presenters at a Q&A panel session at a Synthesis Community Event at Cadence Dec. 8, power minimization and optimization are at the top of the list. The panel included three user presenters, an ARM executive, and a Cadence...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Dec 19 2011
How Logic Synthesis is Changing
You probably haven't read much about logic synthesis lately -- it's a mature technology that doesn't attract much attention. But that doesn't mean that new and exciting things aren't happening in synthesis and front-end design, as illustrated by presentations at a Synthesis Community...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Dec 14 2011
Three Die Stack -- A Big Step “Up” for 3D-ICs with TSVs
A major advancement in 3D-IC through-silicon via (TSV) design will be unveiled Tuesday (Dec. 13) as representatives of CEA-LETI and ST-Ericsson describe the development of a three-die stack with wide I/O memory and logic. This tapeout is the result of a collaboration between these two organizations and...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Tue, Dec 13 2011
Video: Why TSMC Cares About System-Level Design
Why would TSMC, the world's largest foundry, care enough about electronic system-level (ESL) design to include it in a reference flow? In the short video clip embedded below, Ashok Mehta, senior manager of system verification and software architecture at TSMC, explains why and how his company worked...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Nov 16 2011
Q&A: Jim McCanny Discusses Altos Design and Fast IP Characterization
In May 2011 Cadence announced the acquisition of Altos Design Automation , a provider of ultra-fast characterization tools that model timing, noise, power, and process variations for "foundation" IP (standard cells, I/Os, memories). In this interview Jim McCanny, co-founder and former CEO of...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Tue, Jul 5 2011
User View: Low Power Challenges at 40nm and Below
Low power design is hard enough at 65nm and above, and it poses additional challenges at 40nm and below, according to Alex Kuo, department manager at SoC design firm Global Unichip Corp. As noted in another Cadence Community blog post by Qi Wang, Kuo offered a presentation on low-power design at the...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Tue, Jun 21 2011
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