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power gating

  • CTS for design with multiple power domains

    Hi, I have a power gated domain that I'm trying to implement that I'm having trouble with CTS. I have 2 power domains : base_domain(always on) and gated_domain(power-gated). Both domains have multiple clocks in the domains that I'm trying to synthesize clock tree for. For some reason, when...
    Posted to Digital Implementation (Forum) by fieldy on Thu, Jan 30 2014
  • Spectre XPS – Cadence Reinvents FastSPICE Simulation

    Last year I wrote a blog post suggesting that FastSPICE simulation technology is "hitting the wall." A new approach is clearly needed, and Cadence is responding this week (Oct. 9, 2013) with Spectre XPS (eXtensive Partitioning Simulator), a FastSPICE simulator that sets new milestones for speed...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Oct 9 2013
  • UltraSim simulation issue for Power-up Rush Current Analysis with Power Gate(Switch)

    Hi All, I'm trying to run a rush current Analysis for a power-gated design I am implementing. I've been going through the Encounter and EPS manual to set the analysis up properly and I don't think I'm doing anything wrong...But whenever I run the power-up (rush current) analysis, EPS...
    Posted to Digital Implementation (Forum) by fieldy on Wed, Sep 25 2013
  • optDesign command in SoC Encounter

    Hi all, I was wondering if there is a way to disallow the movement of cells by the optDesign command in SoC Encounter. I have two power domains, where one power domain contains cells that are power gated (rails are virtual vdd and gnd) and the other power domain has nominal supply. However, when I run...
    Posted to Digital Implementation (Forum) by Northfork on Sun, Apr 21 2013
  • Video, Presentation – Low Power Design with ARM Physical and Processor IP

    Most system-on-chip designers have two things in common - use of ARM physical and/or processor IP, and a mandate to reduce power consumption. There's a wealth of information on low-power design with ARM IP in a newly available video, as well as presentation slides, from an hour-long presentation...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Dec 17 2012
  • Low-Power Technology Summit Proceedings Now Available

    On October 18, 2012 Cadence held a Low-Power Technology Summit at our San Jose, California headquarters. Experts from Cadence and other leading companies presented the latest low-power design methodologies. Well, it took us a while but you can now view the material via the Low-Power Technology Summit...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, Dec 5 2012
  • Is Fast SPICE Simulation Hitting a Wall?

    The transistor-level SPICE simulator has been the gold standard for custom/analog verification for decades. But SPICE is too slow for many applications in which transistor-level accuracy is needed. So-called "Fast SPICE" simulators can provide considerable speedups -- but current Fast SPICE...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Nov 19 2012
  • Mixed Signals from European Low-Power Designers

    Early summer is a good time to visit Europe. I was there for the first couple of weeks in July, before most of Europe disappears on vacation. I spent my time mainly with customers in Germany, Ireland and the UK. It's not the weather that makes it a good time to visit - while it was nice in Germany...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, Jul 25 2012
  • What’s Cool for Low-Power at DAC?

    Low-power design promises to be a key theme of the Design Automation Conference once again! At DAC 2012 at San Francisco's Moscone Center next week (June 4-7), if you need to cover design, implementation and verification of this important subject, there's a lot to choose from at Cadence's...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, May 30 2012
  • Low-Power Design? Brian Bailey Gets It

    Hats off to Brian Bailey! If you haven't been following his EDA Designline Power Series on eetimes.com you have been missing out. Throughout April, he's been running a pretty comprehensive series of editorials, opinion pieces and contributed articles on the subject of low power design. As he...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, May 2 2012
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