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  • Virtuoso GDS Via Problem

    Hi! I'm having problems with vias, which are exportet to GDS files. I exportet the chip layout from Encounter to a GDS file: streamOut chip.gds.gz -mapFile ../setup/gds2.map -libName DesignLib -stripes 1 -units 1000 -mode ALL The GDS file is hierarchical and instanciates standard cells, io pad cells...
    Posted to Custom IC Design (Forum) by Johann Glaser on Tue, Aug 16 2011
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