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ncvhdl,RTl compilerL Compiler

  • using ModelSim/QuestaSim VCD file in RTL compiler

    Hi, I want to use VCD file from QuestaSim 6.0 in RTL compiler to obtain power report. The netlist file I am using in QuestaSim for simulation and VCD file generation is also generated by RTL compiler byt when I run following commands I got no asserted signals in the power result. Does RTL compiler supports...
    Posted to Logic Design (Forum) by dkhan on Tue, Jun 18 2013
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