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ncelab

  • Re: merging three worklibs into one

    thanks for ur reply... Please find the example below. file list verilog_1.f contains only one file named system.sv, file list verilog_2.f contain files named multiple.v and divider.v , file list verilog_3.f contains only one file named adder.vhd system.sv code: module system(); int a,b,out; multiple...
    Posted to Functional Verification (Forum) by usha sudhagar on Wed, Feb 19 2014
  • merging three worklibs into one

    we have a issue in merging 3 worklib( worklib_1,worklib_2,worklib_3 which has been created during compilation) during elaboration phase. Command used for creating those worklib is:(top file - system.sv) ncverilog -compile +ncaccess+c +notimingchecks -timescale 1ns/10ps +licq_ncv -l verilog1.log -work...
    Posted to Functional Verification (Forum) by usha sudhagar on Wed, Feb 19 2014
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