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Zynq-7000'
Using Physical USB Devices with the Xilinx Zynq-7000 Virtual Platform
There are two choices for how to handle USB devices in a virtual platform. A USB device can be modeled using C/C++ programming, or a physical USB device can be plugged into a computer and attached to the simulator. The Xilinx QEMU for Zynq uses physical USB devices. The Cadence SystemC Virtual Platform...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Thu, May 24 2012
Xilinx Zynq-7000 Virtual Platform Performance: Native Linux vs. VirtualBox
In my last blog post , I covered three frequently asked questions about using the Xilinx Zynq-7000 Virtual Platform as a VirtualBox appliance. Today, I'll cover the next most frequently asked question. It is related to simulation performance. This should not be considered an official benchmark as...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Mon, May 7 2012
Modeling Large Memories in SystemC
Sometimes Virtual Platforms model systems with large amounts of memory. Many embedded systems have a gigabyte or more of SDRAM. For example, one of the Xilinx Zynq boards, known as ZC702, has a Linux Device Tree source file defining the memory size as 0x40000000, or 1 Gb. Thinking about a SystemC model...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Fri, Apr 13 2012
The Zynq Virtual Platform: Not Just for Pre-Silicon
One of the biggest misconceptions about Virtual Platforms is that they are only useful for pre-silicon software development, and once a chip and board is ready they are quickly discarded. Even after boards are available, Virtual Platforms are valuable for software development. Last week I was talking...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Tue, Feb 7 2012
Creating the Zynq Virtual Platform, Including Errata
Although I have never contributed any code to the Linux kernel, the headline We are all Linux developers now on linux today caught my eye. One of the things that amazes me is how many embedded products use Linux and how they deal with all of the complexity. Nearly every product has similar but different...
Posted to
System Design and Verification
(Weblog)
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jasona
on Fri, Jan 6 2012
Video: Why TSMC Cares About System-Level Design
Why would TSMC, the world's largest foundry, care enough about electronic system-level (ESL) design to include it in a reference flow? In the short video clip embedded below, Ashok Mehta, senior manager of system verification and software architecture at TSMC, explains why and how his company worked...
Posted to
Industry Insights
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by
rgoering
on Wed, Nov 16 2011
Welcome to the Zynq-7000 Virtual Platform
As you might guess we are pretty excited about the Virtual Platform development for the Zynq-7000 EPP . The FPGA world has changed a lot from 1995 when I was an FAE at Cypress Semiconductor selling and supporting programmable logic devices. This was during the transition from schematic capture to HDLs...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Fri, Oct 28 2011
Virtual Platform UART Use Number 3: Using gdb to Debug a Software Application
This is the next installment in my series covering the uses of the venerable UART in Virtual Platform simulation. Use the links below to review the previous articles: Introduction Connecting an xterm to a UART Using telnet to connect to a UART This article covers using gdb to debug a program running...
Posted to
System Design and Verification
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by
jasona
on Thu, Sep 22 2011
Virtual Platform UART Use Number 2: Using telnet to Connect to a UART
Welcome to the next installment in my series about different ways to use the venerable UART in Virtual Platforms. If you missed the first two parts you can review the introduction and use case 1, about using xterm in slave mode for an interactive terminal . This article explains another way to provide...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Tue, Sep 6 2011
A Must Read: the ARM Cortex-A Programmer's Guide
For the last couple of years, I have been getting a lot of e-mail from different LinkedIn groups. I'm interested in groups like Android, Embedded Linux, ARM, EDA Bloggers, and more. A majority of the days I don't have time to read much (or any) of the information and end up deleting a lot of...
Posted to
System Design and Verification
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by
jasona
on Thu, Aug 4 2011
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