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layout,layer functions

  • Custom Inductor | INDDEF layer | HitKit | Assura

    Hi, this post isin reference to http://www.cadence.com/community/forums/T/14022.aspx , where i described problems concerning an inductor that had been automatically generated by VPCD tool. Defining the layout of the inductor as a blackBox does not solve the problem, for assura does not recognize pins...
    Posted to Custom IC Design (Forum) by pitter on Tue, Dec 1 2009
  • PR Boundary

    Hello, When drawing layout from schematic, there is a PR Boundary option in the 'Generate All From Source' dialog box. It is depicted as a cyan field, that covers other layers. Placing a transistor (or ony other cell) on it makes it invisible (the PR boundary covers it). What is its purpose and...
    Posted to Custom IC Design (Forum) by pitter on Mon, Nov 16 2009
  • How to modify a automatically generated instance.

    Hi, After inductor cell generation (done with Passive Component Designer - PSD) I made DRC check, that found errors in the layout schematic. The problem is that some vias are placed too near to the edge of the polysilicon Patterned Ground Shield - PGD. I tried to remove the vias or correct the layout...
    Posted to RF Design (Forum) by pitter on Thu, Nov 5 2009
  • What is the syntax for creating pins withing SKILL

    I tried accessing the documentation, but it seems to be unavailable at my university this year. I was just wondering what the syntax for creating a pin is. I think it is dbCreatePin( ) but i don't know the parameters. Also is there a way to specify what material/metal the pin is created on?
    Posted to Custom IC Design (Forum) by JMCaJHU on Wed, Sep 16 2009
  • Re: Test point has poly under it

    Hi, The thread below has skill code that'll return a list of the layers at a given point across the complete hierarchy. http://groups.google.co.uk/group/comp.cad.cadence/browse_thread/thread/503a417a2bc94e33/452d4c829587484d The individual message is: http://groups.google.co.uk/group/comp.cad.cadence...
    Posted to Custom IC Design (Forum) by oojah on Fri, Jun 19 2009
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