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ius 9.2,gui

  • Internal error during elabration phase

    Hi, I am facing the below error when i tried to simulate a simple verilog environment,is this the tool setup issue w.r.t my source file or something other,please help me out. Writing initial simulation snapshot: worklib.tb_counter:v ncsim: *F,INTERR: INTERNAL ERROR Observed simulation time : 0 FS + 0...
    Posted to Functional Verification (Forum) by mdkaleem on Tue, Sep 4 2012
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