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irun

  • automatic insertion of E2R and R2E connect modules

    Hello, I'm trying to run a very trivial example to see how the automatic insertion of E2R and R2E connect modules works. Please find the code below. Unfortunately, I get the following elaboration error: Elaborating the design hierarchy: Top level design units: top Discipline resolution Pass... ncelab...
    Posted to Functional Verification (Forum) by freitas on Tue, May 22 2012
  • VCD and irun

    Hi Can anybody tell me what switch I need to use to dump VCD file while using "irun" Thanks in advance
    Posted to Logic Design (Forum) by ganeshK2012 on Fri, May 18 2012
  • Re: IUS 10.2 irun - how to re-run an already compiled snapshot

    On the first invocation of irun, add -elaborate to the command line. This will cause irun to perform compile and elaborate, creating a snapshot but not simulating. The snapshot can then be simulated by using the irun -R option (or -r <snapshot>) that I described previously. More detailed descrptions...
    Posted to Functional Verification (Forum) by Stewart on Thu, Apr 26 2012
  • reg : vhdl design with systemverilog testbench

    Hi Everyone, Could someone help me in verifying "vhdl" design using systemverilog testbench , i am using INCISIVE 10.20.026 as "irun sample.vhd tb_sample.sv" and it is giving the following error " ASSERT/WARNING (time 0 FS) from package ieee.STD_LOGIC_ARITH, this builtin function...
    Posted to Functional Verification (Forum) by Srikanth Madam on Thu, Jan 12 2012
  • Elaboration error in irun. IUS

    Hi all, I got a design from someone which has lot of elaboration errors. Tool is stopping at the first occurence of elaboration error. I would like to see all elaboration errors at one time(I mean tool has to continue even after an elaboration error). This would be helpful for me.. so that i can fix...
    Posted to Functional Verification (Forum) by ravi999 on Tue, Mar 29 2011
  • merging issues in functional coverage

    Dear Sir/Madam I am having problems in merging the databases generated for functional coverage. Individually tests show that the individual cvergroups/coverpoins show higher values, but when merged these values fall. also by experimentation i foudn that these happen to bethe values accumulated for the...
    Posted to Functional Verification (Forum) by hariharans on Tue, Nov 30 2010
  • functional coverage database not getting merged

    hi I tried to merge functional coverage for 2 test. its not getting merged. it always show same figure. can anybody comment on it. further when I collect coverage for individual test, for both test, it shows 30%. but for second test when I see internal covergroup figures, those are different. strange...
    Posted to Functional Verification (Forum) by sautech on Tue, Nov 30 2010
  • arguments to tcl file with irun

    Hi, I have a requirement where I want to pass arguments to the TCL file used with the irun command for my functional simulation test. A sample example would be irun <options> -input myfile.tcl <tcl_file_arguments> I tried to add arguments to the command line, but the irun interprets the TCL...
    Posted to Functional Verification (Forum) by hrawal on Wed, Nov 10 2010
  • passing IRUN command-line arguments into vsif file?

    Hi, I use command-line arguments in my script and it looks like this irun ... +define+MY_ARG ... I can run stand-alone simulation with different MY_ARG to different tests. How can I reuse my script in a vsif to launch regression of all tests? Is there a way to define an attribute so I can specify MY_ARG...
    Posted to Functional Verification (Forum) by xzhao on Wed, Sep 8 2010
  • Testbench with non-unique module names in sub-blocks

    I have a testbench where I am trying to simulate two separate designs that share some module names within their designs. For example, one is a bus controller and the other is bus master and each has a module named InterfaceIo. When I try to simulate there is a conflict of multiple modules with the same...
    Posted to Functional Verification (Forum) by mattyc on Wed, Apr 14 2010
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