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industry insights,TSVs,DAC

  • Si2 DAC Panel: What Standards are Needed for 3D-ICs?

    3D-ICs with through-silicon vias (TSVs) are not yet in volume production, but work has already begun on design standards - and more work is needed soon. An excellent update on work in progress, and a discussion of what's needed, was provided at a Silicon Integration Initiative (Si2) panel discussion...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Jun 28 2012
  • TSMC-Cadence Collaboration Helps Clarify 3D-IC Ecosystem

    Perhaps the most challenging question about 3D-IC design is what gets done when, by which kind of provider. With its recently introduced chip-on-wafer-on-substrate ( CoWoS ) process, TSMC has taken a step towards clarifying what the 3D-IC ecosystem might look like. And Cadence helped refine the methodology...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Jun 4 2012
  • Two New Resources for 3D-IC Design

    Just in time for the Design Automation Conference (DAC), two new publications are providing fresh perspectives about 3D-IC design. First, the Global Semiconductor Alliance ( GSA ) has released a "3D-IC Design Tools and Services Tour Guide" for next week's DAC. Secondly, a new Cadence technical...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Jun 2 2011
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