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TSMC 2013 Symposium: Progress in 20nm, 16nm FinFET, and 3D-IC Technologies
The TSMC 2013 Technology Symposium , held April 9 in San Jose, California, brought good news for anyone interested in advanced node or 3D-IC technologies. Keynote speakers noted excellent yields and significant progress in 20nm planar, 16nm FinFET, and Chip-on-Wafer-on-Substrate (CoWoS) technologies...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Sun, Apr 14 2013
Video: Cadence VP Tom Beckley Discusses Advanced Node Custom/Analog Challenges
Any discussion about advanced node (below 28nm) that focuses only on digital design is missing an important part of the story. Custom/analog design must be considered too, and that's the subject of a video interview with Tom Beckley, senior vice president of R&D for Custom IC and Simulation at...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Nov 5 2012
TSMC Forum: An Update on 20nm, 3D-IC, and 16nm FinFETs
TSMC, the world's largest semiconductor foundry, is thinking big when it comes to next-generation process technology. At the TSMC Open Innovation Platform (OIP) Ecosystem Forum Oct. 16, TSMC described reference flows for 20nm and for multi-die integration, and revealed that ARM and TSMC are working...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Oct 17 2012
20 Questions on 20nm – And a New Resource for Advanced Node Design
If you're currently doing or contemplating IC design at 28nm and below, you no doubt have some questions. One place to get a lot of them answered is an Advanced Node microsite newly launched by Cadence for both digital and custom/analog designers. And one interesting (and new) document you'll...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Jul 26 2012
SPIE Papers Showcase DFM and Lithography R&D
Ten Cadence papers planned for the upcoming SPIE Advanced Lithography conference, set for Feb. 12-16 in San Jose, California, demonstrate recent R&D developments in both "design side" design for manufacturing (DFM) and the computational lithography that takes place during the manufacturing...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Jan 26 2012
GTC: GLOBALFOUNDRIES Charts Course for 28nm, 20nm and Beyond
The 28nm node is "fully enabled" and ready for production ramp-up, and 20nm early adopter flows are available now, according to GLOBALFOUNDRIES executives at the Global Technology Conference (GTC) in Santa Clara, California Aug. 30. In several morning sessions, speakers updated the company's...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Aug 31 2011
Common Platform Forum: A Clearer Path to Advanced Process Nodes
Insights into what you can expect at 32/28nm and below came to the forefront at the Common Platform Technology Forum Jan. 18, a well-attended one-day event in Silicon Valley. One point that caught my attention is that IBM is turning to a "gate last" high-k metal gate (HKMG) technology at 20nm...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Tue, Jan 18 2011
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