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industry insights,20nm,layout-dependent effects

  • User View: A 20nm Custom IC Constraint-Driven Flow

    If the semiconductor industry is going to ramp up for 20nm design, a custom IC flow that can handle this process node is essential. This flow will require more automation than previous nodes. In a recorded audio presentation at the Cadence web site Francois Lemery, member of the Technology R&D group...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Jul 25 2012
  • Whitepaper: 20nm is More Than Just Double Patterning

    Probably the most discussed challenge of the 20nm process node is double patterning, which uses extra masks in order to get lithography equipment to print correctly. That is, indeed, a major change that has impacts throughout the design flow. But as a newly published Cadence whitepaper points out, double...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Jul 9 2012
  • Customer, Partner DFM Concerns Spur New Methodologies

    Design for manufacturing (DFM) may not be as "hot" a topic as it was a few years ago - when there were many independent DFM companies - but foundries and chip design companies are in fact very concerned about DFM at 28nm and below. Some of those concerns have given rise to new technologies...
    Posted to Industry Insights (Weblog) by rgoering on Tue, Feb 7 2012
  • SPIE Papers Showcase DFM and Lithography R&D

    Ten Cadence papers planned for the upcoming SPIE Advanced Lithography conference, set for Feb. 12-16 in San Jose, California, demonstrate recent R&D developments in both "design side" design for manufacturing (DFM) and the computational lithography that takes place during the manufacturing...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Jan 26 2012
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