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industry insights

  • Porting EDA Applications To Multicore -- Part 2
    As noted in part one of this blog series, porting the Encounter Digital Implementation System (EDI) to multicore platforms was a challenging task. That’s no less true for Cadence’s efforts to parallelize the Virtuoso Spectre Circuit Simulator, although the challenges were somewhat different...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Apr 30 2009

  • Porting EDA Applications To Multicore -- Part 1
    The EDA industry is gearing up for what may be its largest retooling ever – retrofitting or rewriting applications to run on next-generation multicore platforms. An inside look at how Cadence ported the Encounter Digital Implementation System (EDI) to parallel processing illustrates some of the...
    Posted to Industry Insights (Weblog) by rgoering on Tue, Apr 28 2009

  • Why Oracle Should Keep Sun's Chip Design Team
    When the news broke last week about Oracle’s intent to buy Sun Microsystems , my thoughts turned to the Sun design and verification engineers I’ve spoken to in recent years. Will Oracle, a newcomer to the world of EDA and chip design, keep that team? The outcome depends on two questions –...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Apr 27 2009

  • A Glimpse Into The Future Of High-Level Synthesis
    High-level synthesis (HLS) is already in production use today, but other exciting and complementary new technologies and capabilities are coming in the future. Recently I talked with Michael “Mac” McNamara and Luciano Lavagno – both of whom are speaking at an April 24 DATE workshop...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Apr 23 2009

  • TSMC Views R&D As Ticket Out Of Recession
    What do you do if your revenues decline nearly 60 percent in the space of two quarters? If you’re TSMC, you hire more R&D people, expand your focus beyond conventional SoCs, and work to innovate your way out of the recession. TSMC’s “can do” attitude was reflected Tuesday...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Apr 22 2009

  • A Qualcomm Perspective on 3D ICs
    3D integration is a promising new technology that can potentially save space and power by stacking die in 3 dimensions. I recently spoke with Riko Radojcic, Qualcomm design lead for TSS (Through Silicon Stacking – Qualcomm’s term for 3D ICs), about how Qualcomm is deploying this technology...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Apr 20 2009

  • Whatever Happened to Statistical Timing?
    Several years ago, there was a lot of publicity about statistical timing analysis, which was thought by some to be the “next big thing” in IC design. Then things got quiet. But as process nodes head into the 45 nm and below territory, statistical static timing analysis (SSTA) may once again...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Apr 16 2009

  • Momentum Grows for IP Power Modeling Standard
    With no standard way to represent power consumption for silicon IP, early IC power estimation can be difficult. But help may be on the way, as the SPIRIT Consortium and its members, including Cadence, discuss possible approaches to IP power modeling. I first became aware of this problem at a seminar...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Apr 15 2009

  • What Cadence Has Learned About SaaS
    Software as a Service (SaaS) for EDA applications has been a hot topic lately, but most of the discussion has been theoretical. Cadence Design Systems’ implementation of SaaS brings some practical experience to the discussion. Software as a Service is a concept in which applications are hosted...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Apr 13 2009

  • High-Level Synthesis Expands Its Mission
    High-level synthesis (HLS) was originally used by consumer products companies who wanted to get to RTL really, really fast. But now its appeal is broadening, and HLS is serving other important purposes, including architectural exploration, faster verification, and IP reuse. First, let’s define...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Apr 9 2009
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