Cadence.com will be under maintenance from Friday, Oct. 3rd at 6pm (PST) thru Sunday, Oct 5th at 11pm (PST).
Cadence.com login, registration, community posting and commenting functionalities will be disabled.
Home > Community > Tags > functional coverage/coverage/verification
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more convenient.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

functional coverage,coverage,verification

  • IMC Exclusion Problem

    Hey all, I am using IMC for my coverage .The problem is the tool automaticaly excludes some block coverage or expressions from the coverage.It shows "Exclusion Rule type : simulation time".Can someone explain what does Exclusion Rule typr mean and how do I remove it so that I can cover all...
    Posted to Functional Verification (Forum) by Enginerd on Sun, Feb 10 2013
  • DVCon 2012: Bringing Continuous Domain into SystemVerilog Covergroups

    On the last day of February 2012, I presented a proposal at the DVCon 2012 Conference to extend SystemVerilog to support a real data type in coverpoint objects in order to facilitate mixed-signal verification for functional coverage. The paper, titled “ Bringing Continuous Domain into SystemVerilog...
    Posted to Mixed-Signal Design (Weblog) by PrabalB on Fri, Mar 30 2012
Page 1 of 1 (2 items)