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extraction,EDI

Panel: 3D-IC Design Experts Tackle “Practical Issues” in 2.5D and 3D TSV Deployment

3D-IC technology has gone from the "grandiose plans" of several years ago to the "practical issues" of ramping up for widespread deployment, according to one panelist at the Electronic Design Process Symposium (EDPS) April 18, 2013 in Monterey, California. That's a pretty good...

Posted to Industry Insights (Weblog) by rgoering on Tue, Apr 23 2013
10nm and 14nm FinFETs Pose Challenges – But Collaboration Brings Solutions

10nm and 14nm FinFET design will have a lot of challenges, but collaboration among semiconductor ecosystem partners is finding solutions, according to a presentation given at the Common Platform Technology Forum Feb. 5, 2013. The presentation was given by Vassilios Gerousis (right), distinguished engineer...

Posted to Industry Insights (Weblog) by rgoering on Tue, Feb 12 2013
Cadence, Samsung Detail 20nm RTL-to-GDSII Methodology

In a recently archived May 2 webinar , speakers from Cadence and Samsung described a 20nm digital design methodology that can manage challenges such as double patterning, variability, and complexity. The webinar discussed EDA tools, physical IP, and 20nm process technologies, and it highlighted a "proof...

Posted to Industry Insights (Weblog) by rgoering on Mon, May 7 2012
Three Die Stack -- A Big Step “Up” for 3D-ICs with TSVs

A major advancement in 3D-IC through-silicon via (TSV) design will be unveiled Tuesday (Dec. 13) as representatives of CEA-LETI and ST-Ericsson describe the development of a three-die stack with wide I/O memory and logic. This tapeout is the result of a collaboration between these two organizations and...

Posted to Industry Insights (Weblog) by rgoering on Tue, Dec 13 2011

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extraction,EDI

Panel: 3D-IC Design Experts Tackle “Practical Issues” in 2.5D and 3D TSV Deployment

10nm and 14nm FinFETs Pose Challenges – But Collaboration Brings Solutions

Cadence, Samsung Detail 20nm RTL-to-GDSII Methodology

Three Die Stack -- A Big Step “Up” for 3D-ICs with TSVs