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ecounter

  • SOC Encounter producing functionality error

    Hi all, I've ran into a particularly a troublesome error while running SOC Encounter. I'm currently implementing a design starting from behavioral verilog, synthesizing using Design Compiler and then running place and route using SOC Encounter. The problem is that the verilog netlist produced...
    Posted to Digital Implementation (Forum) by fieldy on Fri, Feb 28 2014
  • Need to trace a path from a port to all the memory_instance it is connected

    HI All, Have a query on First Encounter tool. I have a port(abc) which is connected to all the memory_pin(abc) in the design through aob's I need to trace the connectivity and dump_out the complete path through that port Second is there a way to hightlight in layout like how they are placed or view...
    Posted to Digital Implementation (Forum) by Anuragjn on Mon, Feb 3 2014
  • Re: Writing out .lib & lef from virtuoso

    Hello Andrew, Thanks for the help.. The issue with lef is that once I export lef from virtuoso and read this to encounter,its not recognised by encounter as a macro. Can we use the lef generated by File->Export->LEF in virtuoso directly to encounter ? Or anything else need to be done for generating...
    Posted to Custom IC Design (Forum) by Shameel on Mon, Oct 7 2013
  • Writing out .lib & lef from virtuoso

    Hi All How can I write out .lib file of a digital module designed in virtuoso ? Also If I want to import this module as a digital block to encounter, how can I make it as a macro/cell ? How to take care of this while writing out lef from virtuoso ? Thanks Shameel
    Posted to Custom IC Design (Forum) by Shameel on Sun, Oct 6 2013
  • UltraSim simulation issue for Power-up Rush Current Analysis with Power Gate(Switch)

    Hi All, I'm trying to run a rush current Analysis for a power-gated design I am implementing. I've been going through the Encounter and EPS manual to set the analysis up properly and I don't think I'm doing anything wrong...But whenever I run the power-up (rush current) analysis, EPS...
    Posted to Digital Implementation (Forum) by fieldy on Wed, Sep 25 2013
  • Virtuoso 6.1.5 to encounter

    Hi All, I have implemented a digital block in transistor level using virtuoso 6.1.5 . I want to do the IO placement for it. The IO library that I had has the following files in it. ===================================================== --> <folderPath>/BackEnd/ * LEF P & R model (in <folderPath>...
    Posted to Digital Implementation (Forum) by Shameel on Wed, Sep 25 2013
  • Virtuoso 6.1.5 to encounter

    Hi All, I have implemented a digital block in transistor level using virtuoso 6.1.5 . I want to do the IO placement for it. The IO library that I had has the following files in it. ===================================================== --> <folderPath>/BackEnd/ * LEF P & R model (in <folderPath>...
    Posted to Digital Implementation (Forum) by Shameel on Wed, Sep 25 2013
  • How to optimize level shifter and isolation instances marked dont touch in Encounter

    Hi All, I am implementing a Low-power design with Power switches and Isolation cells. I have a CPF file that I commit and I can see that isolation cells and level shifters are inserted into the design correctly as I intended. However, whenever I run optDesign, whether it be preCTS, postCTS or postRoute...
    Posted to Digital Implementation (Forum) by fieldy on Sun, Sep 22 2013
  • Filter paths

    hi folks, In my design there are 4000 flops. I need to sort them on the basis of endpoint slack value. I wrote this script in encounter: set paths [report_timing -collection -from [all_registers -clock_pins] -to [all_register -data_pins] -max_points 10000 -nworst 1] set sorted_paths [sort_collection...
    Posted to Digital Implementation (Forum) by AB5001 on Thu, Nov 29 2012
  • Constraining cell placement

    I am looking for commands in Encounter that will group cells together in close proximity, but I can't seem to find them. The commands would be similar to magnet_placement, create_rp_group, and add_to_rp_group in IC Compiler. Can someone give me the names of the commands or a script that would have...
    Posted to Digital Implementation (Forum) by Ken Stevens on Fri, Oct 19 2012
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