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eRM,OOP

  • Technical Tip on How to Use HDL Assertions in e

    While assertion callbacks have existed in Specman/e for several years now, several questions on their usage have surfaced recently, so here is a short refresher on their usage. ABV (Assertion Based Verification) is, more and more, becoming an important aspect of any complete verification. HDL assertions...
    Posted to Functional Verification (Weblog) by teamspecman on Wed, Sep 28 2011
  • e Templates: A Nifty Way To Create Reusable Code

    Hi All, An e template (known as a parameterized type in other programming languages) is a feature that has been around for several releases and can be a great way of creating re-usable code. Templates can be used anywhere a user would like to create a single re-useable object that might operate on different...
    Posted to Functional Verification (Weblog) by teamspecman on Tue, Aug 10 2010
  • e Verification Job Postings We’ve Seen

    Specmaniacs between jobs: over the last few weeks we’ve seen job postings for verification engineering in general, and e/Specman expertise in specific, in the LinkedIn groups: “Experts in SystemVerilog/Specman/VERA/System C” “Think Verification” “HVL (SystemC/C++/Verilog...
    Posted to Functional Verification (Weblog) by teamspecman on Fri, Aug 6 2010
  • New UVM Book Is For You And U But Not Ewe

    A Practical Guide to Adopting the Universal Verification Methodology (UVM) is the first book published on the emerging Accellera UVM . Written by the main authors of the user guide in the UVM release, this book provides more details and extends the methodology to address system level challenges. Unlike...
    Posted to Functional Verification (Weblog) by Adam Sherilog on Wed, Jul 21 2010
  • Cadence Exec: Why Cadence is Comitted to e/Specman

    In case you or your management are wondering about Cadence's commitment to supporting the e language and/or Specman technology, allow us to direct your attention to this interview of Cadence Verification VP Mitch Weaver (who never worked for Verisity, BTW) by industry analyst Richard Goering. As...
    Posted to Functional Verification (Weblog) by teamspecman on Tue, Feb 16 2010
  • DVCon 2010 For The Specmaniac

    At next week's DVCon in San Jose, CA, Cadence will cover all aspects of our verification technologies and methodologies ( full list of Cadence-sponsored activities is posted here ). Of course, Team Specman is here help Specmaniacs discover the many activities that will feature Specman and e language...
    Posted to Functional Verification (Weblog) by teamspecman on Mon, Feb 15 2010
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