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eRM,CDV,Coverage-Driven Verification

  • UVM - 10 Years in the Making ...

    In case you the missed the news today, the Accellera VIP TSC released the first version of the Universal Verification Methodology (UVM). This represents a significant achievement on the part of the TSC as it is the first standard SystemVerilog Base-Class Library and Methodology. While there has been...
    Posted to Functional Verification (Weblog) by mstellfox on Mon, May 17 2010
  • Yikes - Synopsys is Following Me!

    No, I'm not being paranoid -- Synopsys, my largest competitor, is literally following me: Before discoursing on this unusually public display of affection, allow me to take a step back and announce that I've started to tweet on Twitter . While initially put off by the apparent solipsism embedded...
    Posted to Functional Verification (Weblog) by jvh3 on Mon, Jun 29 2009
  • Metric-Driven Verification in a Box...

    In my last few posts, I was explaining our focus here in Cadence Verification on creating the OVM to enable an industry wide VIP eco-system, and trying to make verification more of a closed-loop process with our metric-driven verification methodology. In case you missed the announcement about expanding...
    Posted to Functional Verification (Weblog) by mstellfox on Mon, Dec 29 2008
  • Report from last week's "ClubT" events; preview of next week

    As promised, here are some photos last week events, with embedded color commentary. NOTE: there are two additional events next week that will be featuring none other than fellow blogger and Cadence Distinguished Engineer Mike Stellfox: Kista, Sweden on Monday October 6 Bristol, UK on Wednesday October...
    Posted to Functional Verification (Weblog) by jvh3 on Wed, Oct 1 2008
  • In the EU next week for "ClubT" verification events

    I'll be in the EU next week supporting "ClubT" events focused on advanced verification, with previews of new developments in the "Trailblazer" program. If you are based in the EU and are active in verification in any way, chances are you have already received a direct invitation...
    Posted to Functional Verification (Weblog) by jvh3 on Fri, Sep 19 2008
  • Getting more value from the OVM using Metric-Driven Verification

    With all of the momentum around the OVM these days there has been a lot of good discussion about testbench methodology. The OVM provides a great methodology framework for building modular, reusable verification environments, but there is more needed to get the full value of adopting an HVL like SystemVerilog...
    Posted to Functional Verification (Weblog) by mstellfox on Mon, Sep 15 2008
  • Verification community comes together to talk tech

    I just finished the week at Cadence's CDNLive User Group in San Jose. Over the past few years, it has really become a great technical event for the verification community. In fact, last year out of all the papers presented across the full breadth of Cadence tools and methodologies, Kelly Larson from...
    Posted to Functional Verification (Weblog) by mstellfox on Sat, Sep 13 2008
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