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Incisive Debug Analyzer is a Finalist for EETimes and EDN ACE Software Product of the Year

Great news.... Incisive Debug Analyzer (IDA) is one of five finalists for the EETimes/EDN Annual Creativity in Electronics (ACE) Awards in the Software Product of the Year category. In addition to IDA, Lip-Bu Tan and Cadence are also finalists for ACE Executive of the Year and Company of the Year, respectively...

Posted to Functional Verification (Weblog) by Karnane on Mon, Mar 25 2013
Re: help with reflection

Hello EM, reflection reports on static elements of your code (structs, types, fields, methods, constraints etc.). Method variables don't exist statically, they only 'come to life' when the method is active (executing). There is also no list of all variables of a method, since variables can...

Posted to Functional Verification (Forum) by hannes on Thu, Mar 21 2013
help with reflection

Hi all I am looking for a way to get all the local variables within a specific method. i didn't find an API function in rf_method struct that do such operation. i will happy if some one can show me how it is done. Regards. EM

Posted to Functional Verification (Forum) by myonlyscreen on Thu, Mar 21 2013
DVCon 2013: Functional Verification Is EDA’s “Killer App”

With another year of record attendance, DVCon has again proven that a functional verification-focused mix of trade show and technical conference is what customers need to get their jobs done. Here are some of the some of the highlights I took away from this informative event: DVCon 2013 was a one stop...

Posted to Functional Verification (Weblog) by jvh3 on Sun, Mar 10 2013
Bidirectional has() and count() List Pseudo-Methods

Hi. As of the 11.1 release, the list.has() and list.count() list pseudo-methods can be treated as bidirectional constraint operators. In 11.1, list.has() and list.count() are solved unidirectionally by default. To ensure that these pseudo-methods are solved as bidirectional expressions, set the config...

Posted to Functional Verification (Forum) by IonutC on Tue, Mar 5 2013
DVCon 2013 for the Specmaniac

At the upcoming DVCon (in San Jose, CA February 25-28) , Cadence will cover all aspects of our verification technologies and methodologies (full list of Cadence-sponsored events is here ). Of course, Team Specman cannot resist drawing your attention to the many activities that will feature Specman and...

Posted to Functional Verification (Weblog) by teamspecman on Thu, Feb 7 2013
UVM SystemVerilog in a Multi-Language SoC World: UVM-ML Webinar

Every SoC project uses multiple languages. Even if the design itself is purely Verilog RTL, it's likely that you have some PLI-based stimulus. In many cases there are multiple languages in use due to multiple suppliers, globalized teams, multiple abstractions, and more. Integrating e , SystemVerilog...

Posted to Functional Verification (Weblog) by Adam Sherilog on Thu, Oct 11 2012
Re: time between two events

you have sys.time and sys.realtime. You can log the time value when an event happens (using for example and on block) and next time you can calculate the delta. -hannes

Posted to Functional Verification (Forum) by hannes on Thu, Oct 11 2012
Re: Specman Tutorial

Hi Pravin. Welcome to the Specman world! I'm sure you will like it here ;-) If you crank up the "cdnshelp" tool and look under the "Incisive Verification Kits" topic you will find a wealth of self-paced tutorials / workshops to experiment with. These guide you through constructing...

Posted to Functional Verification (Forum) by StephenH on Mon, Sep 17 2012
Specman Tutorial

Hi everybody , Can anybody please suggest me quickstart tutorial to specman-e . I have knowledge of systemverilog uvm and now i want to shift to specman e. I Have specman 9.2 and above... are there any tutorials provided by cadence with the tools??? Thanks and regs, Pravin

Posted to Functional Verification (Forum) by pravintavagad on Mon, Sep 17 2012

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Incisive Debug Analyzer is a Finalist for EETimes and EDN ACE Software Product of the Year

Re: help with reflection

help with reflection

DVCon 2013: Functional Verification Is EDA’s “Killer App”

Bidirectional has() and count() List Pseudo-Methods

DVCon 2013 for the Specmaniac

UVM SystemVerilog in a Multi-Language SoC World: UVM-ML Webinar

Re: time between two events

Re: Specman Tutorial

Specman Tutorial