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  • Problem in viewing grid during Layout

    Sir/Madam, I have been using Cadence Virtuoso and the process chosen is 65nm CMOS . While trying to Layout a design it is found that the grid is not visible but if we zoom till only one transistor, the grids become visible. My querry is Is there any issue if grid is not visible while doing Layout...
    Posted to Custom IC Design (Forum) by Jithin on Mon, Aug 19 2013
  • turning off net name display

    We've just started using a design kit from a new vendor and I'm trying to make our schematics display the same information as our previous design kits. I'm having issues with the net name display. I've never had to fiddle with this before and cannot find the setting/variable to turn off...
    Posted to Custom IC Design (Forum) by linbo on Mon, Apr 16 2012
  • Encounter Quick Tip: Dimming the Display with F12

    I remember when I first started working with the Cooper & Chyan Technology (CCT) router back in the day. It had this great feature where you could darken the display for everything in the design other than what you had selected. This was particularly useful when you were trying to route a net because...
    Posted to Digital Implementation (Weblog) by BobD on Fri, Sep 30 2011
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